[SI-LIST] Re: PC debug port pinout?
- From: "Brian Schieck" <BSchieck@xxxxxxxxxx>
- To: <ray.anderson@xxxxxxxxxx>, <esayre@xxxxxxxx>
- Date: Thu, 15 Dec 2005 13:40:10 -0800
I believe the right path is ...
http://www.intertesttech.com/ate/app-notes.htm
App. Note # 1
Brian Schieck
NVIDIA Corporation
2701 San Tomas Expressway MS C144
Santa Clara, California 94544
Direct Phone # (408) 486-2697
Main Phone # (408) 486-2000
Facsimile # (408) 486-2200 Corporate
Facsimile # (408) 486-3076 Direct
Email bschieck@xxxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ray Anderson
Sent: Thursday, December 15, 2005 1:23 PM
To: esayre@xxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; Ray Anderson
Subject: [SI-LIST] Re: PC debug port pinout?
Ed-
See the following document:
http://www.intertesttech.com/download/App1_Debug_Port_Design_Guidelines.
pdf
-Ray
Raymond Anderson
Senior Signal Integrity Staff Engineer
Product Technology Department
Advanced Package R&D
Xilinx Inc
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Dr. Edward P. Sayre
Sent: Thursday, December 15, 2005 1:16 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PC debug port pinout?
Folks:
Does anybody know of the specification for the pinout of the PowerPC
debug=3D20
port?
ed sayre
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