[SI-LIST] Re: OTA ouput noise

  • From: chao wang <mailbox.chao.wang@xxxxxxxxx>
  • To: Hari Shanker Gupta <hari@xxxxxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
  • Date: Fri, 16 Jan 2009 18:02:40 +0100

Hello

I have made a photo in the attachment. It is a quite simple OTA with
CMFB. The red one is added capacitiors, which is connected to the
input. In the simulation, I only give the input a constant voltage and
examine the output noise.



2009/1/16 Hari Shanker Gupta <hari@xxxxxxxxxxxxxxx>:
>  Hello wang
>
> Can you please give details of architecture(Topology) u have selected. Why u
> are trying to reduce noise by putting extra capacitors ?
>
>
>
> --- Original Message ---
>
> From: chao wang <mailbox.chao.wang@xxxxxxxxx>
> Sent: Wed, 14 Jan 2009 10:53:13 +0100
>
>> Hello,
>> I have done a analog simulation of OTA in Cadence, this OTA is quite simple,
>> it is an difference pare with the load of biased MOS, double ended.  I need
>> this OTA to archive an hyper low output noise(5 uV) .
>> For an ideal case, I only give the input a DC voltage without noise source
>> and measure the output noise, surely there is no signal at output only
>> noise. The noises are all coming from the OTA itself.
>>
>> I found that if I connect the two input withe a capacitors, it can reduce
>> the output 90% of the noise. For the theory, the input capacitor can not
>> filter the noise. I also found that the input capacitors do not change the
>> noise band.
>>
>> Who can tell me how the noise reduce.
>>
>> --
>> Chao WANG
>>
>> EPFL STI  IMT-NE ESPLAB
>> Rue A.-L. Breguet 2
>> CH-2000 Neuchâtel,Switzerland
>> Phone : +41 32 718 34 33
>> E-mail : Chao.WANG@xxxxxxx
>>
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>
>
>
> --
> Regards
>
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> |Hari Shanker Gupta                  |
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>



-- 
Chao WANG

EPFL STI  IMT-NE ESPLAB
Rue A.-L. Breguet 2
CH-2000 Neuchâtel,Switzerland
Phone : +41 32 718 34 33(office) +41 76 218 86 88(mobile)
E-mail : Chao.WANG@xxxxxxx(school) Chao.WANG@xxxxxxxxxxxxxxxxxx(private)

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