[SI-LIST] Re: NAND Toplogy Querry
- From: Prashant Jaiswar <prashant.jaiswar@xxxxxxxxx>
- To: Naresh.Dhamija@xxxxxxx
- Date: Fri, 14 Sep 2012 16:58:45 +0530
Please refer ONFI3.0 Spec.
You would find the answer to your query.
BTW is it a standard NAND or NV-DDR or NV-DDR2???
Regards,
Prashant.
On Fri, Sep 14, 2012 at 4:11 PM, Dhamija, Naresh <Naresh.Dhamija@xxxxxxx>wrote:
> Hi,
> I am working on NAND System SI. I see that even if NAND Flash package has
> two OR more channels. On PCB, one data line is connected to two different
> parts. It could have been connected to two separate channels of same parts
> also. I am not aware of much of protocol level of this. If someone can give
> explanation OR reference regarding this, it would be of great help.
>
> Regards
> Naresh
>
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