[SI-LIST] Memory Interface placement and routing Topology.

From: "avulab" <avula.bhaskara@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Thu, 6 Jul 2006 21:34:03 +0530

Hi gurus,

 

Could U please suggest me the topology for EMIF (External memory interface)?

There are 2 SDRAMs, Flash, Mictor connector and one Display device on EMIF
bus which are connecting to the Processor

 

Constraints

1. As the SDRAM has stringent timing constraints; the trace length from
Processor to SDRAM should not

 

Here my quick questions

1. Which device should place first (its is closer to the Processor)

2. Which topology should I follow (Daisy-chain topology or any other)

 

Presently I am planning to place in this order
FLASH-SDRAM1-SDRAM2-MICTOR-and then Display device.

 

 

Gurus please suggest me 

 

 

Thanks and regards

Bhaskar




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[SI-LIST] Memory Interface placement and routing Topology.

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