[SI-LIST] Re: Meaning of clock forwarding
- From: Ria R <ria_rr_84@xxxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>, Joseph.Schachner@xxxxxxxxxx
- Date: Thu, 27 Aug 2009 15:48:23 -0700 (PDT)
Gurus,
Thanks alot for all the answers....definitely helped alot!
Another (rookie) question in the same regard... if I want to calculate the
timing margins for an interface with clock forwarding... I believe I know how
to calculate the Tsu and Thld margins for read and write timing...but how do I
calculate the setup and hold margins to make sure the "timing" is met...
In other words, when i calculate the Tsu and Thld margins, when do I know I
have the right clock and data lengths so that this design will work without
shortage of Tsu and Thld?
Thanks,
Ria
________________________________
From: steve weir <weirsi@xxxxxxxxxx>
To: Joseph.Schachner@xxxxxxxxxx
Cc: Ria R <ria_rr_84@xxxxxxxxx>; si-list@xxxxxxxxxxxxx
Sent: Tuesday, August 25, 2009 3:21:45 PM
Subject: Re: [SI-LIST] Re: Meaning of clock forwarding
Joseph, good stuff.
SONET was a bit more complicated than you describe. SONET clock is
statistically embedded in the transmit stream by scrambling the data with a
PRBS7. This worked great for voice. It's not so good for data which is
primarily why we see overlay scrambling schemes. On receive SONET uses the
locally received clock to recover the data stream. It then buffers and
transmits using a reference clock which could come from any number of places
depending on where the equipment is in the hierarchy. A box with OC192 links
might be transmitting with a clock derived from a lowly T1/E1 card. This
pretty much changed with cheap GPS as it became affordable to have a low
stratum # clock in almost any box.
Steve.
Joseph.Schachner@xxxxxxxxxx wrote:
> Interesting question. Many recent standards use "Spread Spectrum
> Clock" (SSC), where the clock frequency varies up to 5000ppm with about a
> 30KHz triangular (or similar) modulation profile. The reason for SSC is
> simply that it makes it easier to pass radiated emissions tests.
>
> So, what does such a standard require of the receiver? Choices:
> 1) Recover a sampling clock from the data. Usually done with a PLL. Has
> interesting issues of Transmitter PLL bandwidth (to multiply up a lower
> frequency) vs Receiver PLL bandwidth (Receiver bandwidth should be higher,
> but not too high). With this technique, the clock had better not change
> frequency faster than the receive PLL's ability to follow.
>
> 2) Send along the TX clock with the data. Now, in theory, the clock can do
> anything - it doesn't even have to be a particularly stable frequency.
> Whenever the clock has a rising edge, the data is sampled. But, it's not
> that easy. With this technique, the skew between the clock and the data is
> carefully controlled (ie, can't be too many UI mismatch) and the receiver
> has to optimize sampling phase. As frequencies get higher, delay between
> clock and data gets more critical.
>
> Examples:
> HDMI: forwards clock with the data. The high speed link is unidirectional
> - makes this easier to deal with. DVI, the predecessor of HDMI, also
> forwarded the clock.
> PCIExpress: Can use a common 100MHz clock. If so, there is still a TX and
> RX PLL to multiply that up to the bit rate, but at least they agree on SSC.
> Or, can not use a common clock, in which case receivers recover clock from
> data. Add in cards can use recovered clock as their TX clock also; to make
> that work the lanes are never inactive when logically connected, if there
> is no data to transmit an idle pattern is transmitted, so a clock can be
> recovered always.
> DisplayPort: does not forward the clock. Interesting, considering HDMI did.
>
> Some older standards (for example SONET and FibreChannel) that did not use
> SSC, required a VERY stable clock, and used a simple 1 pole PLL just to
> keep the receiver at the right frequency. I'm sure SONET did not forward a
> clock, the clock was recovered from the data, but clock recovery was pretty
> simple since the bit rate did not vary.
>
> I hope this helps at least a little.
>
> -- Joe S.
>
>
>
>
>
> Ria R
> <ria_rr_84@yahoo.
> com> To
>Sent by: si-list@xxxxxxxxxxxxx
>si-list-bounce@fr cc
>eelists.org
> Subject
> [SI-LIST] Meaning of clock
08/24/2009 03:13 forwarding
PM
>
>
>
> Gurus,
> I have a very simple question:
> What exactly does clock forwarding mean?
> I have read in multiple designs that clock forwarding aids in designing
> memories with low skew delays... since clock is sent with data and control
> signals.
> So does this fall under source synchronous or common clock methodology?
> How does it aid in reducing dealys due to clock skew?
> Thanks in advance,
> Ria
>
>
>
>
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