[SI-LIST] LVDS DDR or CMOS SDR interface
- From: "Aleksandrs Maklakovs" <Aleksandrs.Maklakovs@xxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 14 May 2012 16:27:15 +0300
Hello,
I need to choose parallel interface between FPGA and 125 Msps ADC, ADC
has two bus options
DDR LVDS and SDR CMOS(CMOS bus width is twice bigger). Which option
would be better from
SI point of view and why?
With regards,
Aleksandrs
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