SI-List, Has anyone done or know a reference to the solution of the stripline thru the via (plated thru hole) "field" of a BGA(that can be shared)? I'm concerned with the periodic array of circular holes in the reference (ground) planes of the stripline and the associated "via fence-like" structure and their effects on the impedance and S-parameters. I'm looking at some very fast edge speeds requiring greater than 5GHZ -3dB bandwidths and am hoping to get away from blind vias construction (i.e. multiple lamination cycles). I've read of results for a "grid" ground plane in multilayer ceramic substrates, but never a "swiss cheese" ground plane in a printed circuit board. Thanks, Walt Kreiger ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu