[SI-LIST] Re: Hyperlynx for stackup design
- From: "Bill Hargin \(In-Circuit Design\)" <b.hargin@xxxxxxxxxx>
- To: <Patrick_Carrier@xxxxxxxxxx>, <mfilion@xxxxxxxxxxxxxxx>, "'SI-LIST mailing list'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 4 Mar 2013 15:06:16 -0800
Hi Marc-Andre:
We have a tool that helps bridge the gap between what Pat's mentioning here
(using the right thicknesses and Dk's), HyperLynx, and your PCB tool.
A thread on the SI list just a couple of weeks ago discussed how difficult
it can be to find and track all of the material properties from different
vendors, and we've tried to make that easier by pulling that data into our
libraries. When you're done planning your stackup (in our tool), you can
shoot the results to HyperLynx, if you like, for further analysis, and/or to
your PCB environment. To your earlier question, it would give you two sets
of field solver results to compare, as well.
E-mail me offline if you want to give it a try.
Bill Hargin
In-Circuit Design, USA
Software & SI Simulation for High-Speed PCB Design
(425) 301-4425 b.hargin@xxxxxxxxxx Skype: bill.hargin
Online: www.icd.com.au
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Carrier, Patrick
Sent: Monday, March 04, 2013 1:55 PM
To: mfilion@xxxxxxxxxxxxxxx; SI-LIST mailing list
Subject: [SI-LIST] Re: Hyperlynx for stackup design
Hi Marc-Andre--
You can get dead-on accuracy with a good field solver like the one in
HyperLynx; the usual problem I see is getting the right numbers from your
board supplier to plug into the stackup editor. For instance, make sure you
are using the correct dielectric constants for the dielectric thicknesses
you are using, and the correct thicknesses. Also make sure you are modeling
soldermask on the outer layers. I talk about these and other factors in a
series of blogs and an article referenced by those blogs, if you are
interested:
http://blogs.mentor.com/hyperblog/blog/2011/08/04/measurement-correlation-is
-just-a-stackup-away/
Actually, if you have generated impedance requirements for your board
supplier, they will give you some feedback on your geometries. It is a good
idea to talk to them early on, especially for differential impedances
because you fix the pitch in your artwork and lock the supplier into meeting
the impedance by adjusting only trace width and dielectric height.
I know others on the list have done some research in this regard as well and
will hopefully comment...
--Pat
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Marc-André Filion
Sent: Monday, March 04, 2013 3:06 PM
To: SI-LIST mailing list
Subject: [SI-LIST] Hyperlynx for stackup design
Content-Type: text/plain;
charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable Hi,
I=92m working on a high-speed 10GBASE-KR design. I=92ve figure out my =
stackup and trace impedance with Hyperlynx. From your experience, will you
drop those numbers in the PCB design tool or there=92s some tricks to change
= to get good design? I know that tools like polar take more parameters into
= account.
Since I only have access to Hyperlynx, how confident should I be?
=20
Regards,=20
=20
=20
cid:image001.png@01CA2C85.29E20030
Marc-Andr=E9 Filion, ing
Concepteur Mat=E9riel / Hardware Designer
Brioconcept Consulting Inc.
4593 Louis-B.-Mayer, Laval, Qu=E9bec, H7P 6G5
450.681.2779 x2368
<http://brioconcept.com/> http://www.brioconcept.com/
IMPORTANT NOTICE
This electronic message contains privileged and confidential = information,
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