[SI-LIST] Re: HyperLynx DRC
- From: "N. Paul Taddonio" <paul.taddonio@xxxxxxxxxxxxxx>
- To: <pcbjack@xxxxxxxxx>, "SI-LIST" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 15 May 2012 13:13:57 -0400
Its kind of exactly what a hardware designer does if he has no simulator yet
wants to apply some sort of
crosstalk control based on rules of thumb: set a minimum gap and then allow
only a controlled
amount of total coupled length. I normally do this by eye when checking
routing of PWB designs.
This seems useful to automate that process. I wonder if it can check
"tandem routes" (layer to adjacent layer).
Paul Taddonio
FuturePlus Systems
PS Jack your name is familiar did we work together in Nashua or Billerica?
----- Original Message -----
From: "Jack Olson" <pcbjack@xxxxxxxxx>
To: "SI-LIST" <si-list@xxxxxxxxxxxxx>
Sent: Tuesday, May 15, 2012 12:33 PM
Subject: [SI-LIST] HyperLynx DRC
> I've been asked to look at a tool called HyperLynx DRC, which (I think) is
> Mentor's incorporation of the QuietExpert rules (developed in
> collaboration
> with UMR?) into the HyperLynx Tool Suite. Anyway, I thought I might share
> a
> picture that grabbed my attention as I was scanning the documentation.
> http://frontdoor.biz/PCBportal/DRC.gif
> This is just one of many types of rules that HyperLynx DRC processes, and
> for this one the user can change the default frequency and distances shown
> in the table, and Mentor will just add up the segments that cross the line
> (D1 and D3) to set the red flag.
> For one thing, it seems fishy to just add D1 and D3 together. And is
> segment D2 really "OK"? Does the default .5 inch and 40 mil settings have
> some basis at 1GHz?
> Maybe that is enough questions for one SI post, but I can't help but
> comment on the fact that the I/O line is labelled as the victim. Maybe my
> board designer bias is showing, but I tend to think of the big bad outside
> world as the aggressor, and my sensitive circuit guts as the victim (at
> least that is true for some of the sensor-based boards I design here). I
> know it works both ways for EMC certification, and it is a big job to
> CONTAIN the frequencies being used today, but can this rule be made to
> work
> both ways? I imagine that these simple rule-based DRC checks look kind of
> silly to a simulator power user, but does this type of tool have any real
> value in the circuit board development process?
> Finally, It seems curious to me that this DRC module is MUCH more
> expensive
> than the SI and PI modules. Why would that be? What is more valuable about
> a rule-checker than a simulator?
> Jack Olson
> Caterpillar, Inc.
>
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>
> List forum is accessible at:
> http://tech.groups.yahoo.com/group/si-list
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>
>
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List forum is accessible at:
http://tech.groups.yahoo.com/group/si-list
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
