Hi,
I think Steve Sandler told me this few years ago...and I have been
doing it this way ever since.
The best way to model a VRM is by taking a VRM eval board from the VRM
chip vendor, replace the output caps to match your design, then
measure its output impedance with a VNA (bode-100 or E5061B-3xx), then
save it into a 2-port S-parameter file.
The control loop adjustments have a huge impact on the output
impedance curve, low frequency plateau can go up/down 10x, the
frequency of the peaks near the fs/2 and loop bandwidth can vary also.
A VRM is not a simple R-L dummy.
In order to use a S-par model for VRM, you need to use a back-end PDN
simulator that supports S-par, for example Keysight ADS (AC-sim), the
freeware QUCS (AC-sim) or Hyperlynx-Linesim (Spar-sim, then convert to
Z-par).
Here is my QUCS template that does that:
http://buenos.extra.hu/download/PowerIntegrityDesign2_prj.zip
Regards,
Istvan Nagy
On 2/22/22, Cosmin Iorga <dmarc-noreply@xxxxxxxxxxxxx> wrote:
Boris,------------------------------------------------------------------
The VRM is a nonlinear device so if you want to model it as a linear circuit
using a simple RL circuit you may want to extract the R and L from an
impedance frequency profile measured at similar load currents that match the
system power consumption. I have done this using PIScanner for FPGA systems
and I've got different impedance frequency profiles at different current
loads and different PDN structures. For example, the VRM loop bandwidth and
location of the VRM voltage sense point make a significant difference. If
you do this measurement taking in consideration all involved factors your RL
model may be more accurate. A simple "small-signal" AC simulation on a VRM
linearized model typically does not produce an accurate result. I have
documented some details of my experiments in app notes on this web site
http://piscanner.com/support if you or anyone else is interested.
Regards,
Cosmin
http://www.piscanner.com
On Monday, February 21, 2022, 06:42:43 AM PST, Boris Bakshan
<bbakshan@xxxxxxxxx> wrote:
Thank you Charles,
I will go ahead and start reading all references. The AC analysis process
that you mentioned, can this be done with Simplis?
On Mon, Feb 21, 2022 at 4:13 PM Charles Hymowitz <charles@xxxxxxxx> wrote:
Boris
You would perform an AC analysis and look at the output impedance (AC 1
source at the output). In some cases, the output capacitance you use can
mask the impedance of the regulator so you need to be careful. Always
plot
the impedance in the on and off states to see what is passive and what is
part of the active loop. However, an RL model is often not sufficient to
model many regulators, especially those with multiple internal loop.
The other, and probably more important issue is that vendor models are
generally not accurate for output impedance. We generally get our own
data
and make our own models. TI has started to be better at this, but almost
all the other VRMs we have tested from all manufacturers have not matched
the model. Most were not even close, especially older regulators.
Here is some material we have published about a better approach which is
to use a state space average model if your simulator allows it. If it
only
allows an RL that could be an accuracy limitation or you will have to
change the RL at each current you want to simulate.
Learn about Power Supply/VRM Modeling for Switchers and Linears
VRM Modeling: A Strategy to Survive the Collision of Three Worlds
https://www.signalintegrityjournal.com/articles/1017-vrm-modeling-a-strategy-to-survive-the-collision-of-three-worlds
Measurement Based VRM Modeling, 2017 IEEE 21st Workshop on Signal and
Power Integrity (SPI) https://ieeexplore.ieee.org/document/7944009
https://www.picotest.com/downloads/Measurement-Base-VRM-Model-Tutorial-Final-2017.pdf
Video: Measurement-Based, Harmonic Balance VRM Model
https://www.picotest.com/blog/video-measurement-based-harmonic-balance-vrm-model/
Characterizing and Selecting the VRM
https://www.signalintegrityjournal.com/articles/831-characterizing-and-selecting-the-vrm
Characterizing the VRM
https://event.on24.com/eventRegistration/EventLobbyServlet?targetþg20.jsp&partnerrefÿD3SS&eventid
52277&sessionidÿkey‰E0C982E79AD60E6B066ACF5CBEFA78®Tagÿourcepageþgister
Measuring and Interpreting Impedance Data
https://event.on24.com/eventRegistration/EventLobbyServlet?targetþg20.jsp&referrerÿtps%3A%2F%2Fwww.signalintegrityjournal.com%2Fevents%2F99-measuring-and-interpreting-impedance-data&eventid
49545&sessionidÿkeyÚ37B34BE8615E5EA7FEB1101C3D0BF8®Tagÿourcepageþgister
Charles Hymowitz - Managing Director
AEi Systems
Charles@xxxxxxxx
(310) 216-1144
(310) 863-8034 (M)
http://www.aeng.com - Analytical Heavy Lifting
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> On
Behalf Of Boris Bakshan
Sent: Monday, February 21, 2022 5:43 AM
To: SI-LIST <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Extracting R-L model of a VRM
Dear SI-Listers,
I have a Simplis model of a VRM and I would like to extract the active
output inductance & resistance for use in a simple series R-L regulator
model.
Is there an easy way to extract it in Simplis or with a different EDA
tool?
Thanks a lot!
Boris
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