[SI-LIST] Re: EMI Containment
- From: zhangkun 29902 <zhang_kun@xxxxxxxxxx>
- To: karthikeyan.loganathan@xxxxxx
- Date: Sun, 08 Aug 2004 22:08:30 +0800
Karthik
What is stitch capacitor? Is it the common cera-capacitor?
Best Regards
Zhangkun
2004.8.8
----- Original Message -----
From: "Loganathan, Karthikeyan (GE Consumer & Industrial)"
<karthikeyan.loganathan@xxxxxx>
Date: Sunday, August 8, 2004 10:02 pm
Subject: [SI-LIST] EMI Containment
> Hi All,
>
> I found a high speed (operated upto 1Ghz), dense board design
> total =
> 10layers, out of which only one 3.3V (layer2) Plane and One Gnd
> Plane =
> (layer9). Other Power traces were routed individually.
>
> To reduce the radiation, they have provided Stitch Capacitors =
> (decoupling) between layer 2 & 9, across the board. All the fast =
> switching signals were routed within these layers.
>
> I am sure, Stitch capacitor technique reduces EMI, but my question
> is, =
> what extent?. Is any better method available?
>
> As you know, the return current paths in the stackup said has wide =
> seperation between signal and reference planes, also the stitch =
> capacitors (SMT) added will have inherent Lead Inductance and
> overall =
> increases the board cost too.
>
> Thanks,
> Karthik
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