[SI-LIST] Re: DDR3 Multi Rank Working ODT

  • From: shankar san <shankar.electronics@xxxxxxxxx>
  • To: Hermann Ruckerbauer <Hermann.Ruckerbauer@xxxxxxxxxxxxx>
  • Date: Wed, 30 Jan 2013 11:40:02 +0530

Hi,
These 8 Rank DDR3 DIMMs are used for Server applications, since there are
very few motherboards which support 8 Rank i couldn't get the complete
controller details as of now.

In meanwhile could you brief me how the DIMMs are accessed by these
motherboards (1 Rank/2 Rank/ 4 Rank / 8 Rank).

If i could get some better picture on how the standard motherboards access
the DIMMs it will help me a lot.

Regards,
S Shankar

On Wed, Jan 30, 2013 at 11:31 AM, Hermann Ruckerbauer <
Hermann.Ruckerbauer@xxxxxxxxxxxxx> wrote:

> Hello,
>
> The easy part is with a two Rank DDR2  configuration.. The simple rule
> is "Terminate the other Rank". So always the non accessed Rank is
> Terminated.
> It got more complicated with DDR3 as now you can also use dynamic ODT
> (Write terminates the accessed Rank). This can help a lot to improve
> Signal Integrity.
> If you have 8 Ranks you need to optimize your ODT setting (Value), and
> scheme (which ODT is switched on for wich access). It depends also on
> your controller capability.
> Any controller that supports 8 Ranks should have quite a lot of possible
> options to utilize the ODT for the different configurations.
>
> Additionally you need to consider different population options (Single
> Rank DIMMs, double rank dimms, Quad Rank DIMMs (?), empty slots,
> population rules). You need to have a solution for all possible
> configurations.
>
> ==> There is no basic rule for such a configuration this is really
> dependent on your System. It will be a lot of work to optimize this
> configurations. This needs to be done by simulation and confirmed by
> measurement to get a stable system for all configuration cases.
>
> ==> Thats a lot of fun!
>
> Best regards
>
> Hermann
>
> P.S. Today we do work with DDR because this investigation was not done
> for a competitive Memory solution and so the first delivered systems
> failed with a one empty slot ...
>
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> schrieb shankar san:
>  > Hi,
> > I am working on DDR3 8 Rank (DIMM), for this i want to do termination on
> > Data signals using ODT option,
> >
> > As per my knowledge only 1 Rank can be accessed by the controller
> > (Motherboard controller) at a time.
> >
> > When controller is writing to a single Rank (Either Read or Write) that
> > particular Rank device ODT's should be enabled but what should be the ODT
> > conditions on other Ranks ( It has to be anabled or disabled or
> Terminatted
> > ot RTT, nom or Terminated to RTT, WR)?
> >
> > Could somebody help me in also understanding how the multirank DIMM's are
> > accessed by the controller along with the ODT options.
> >
> >
> > Regards,
> > S Shankar
> >
> >
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>


-- 
Regards,
S Shankar


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