[SI-LIST] DDR3 - Input Timing Parameter Tutorial
- From: Hermann Ruckerbauer <hermann.ruckerbauer@xxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 06 Aug 2010 16:07:28 +0200
Hello *,
There have been some discussions on memory input Timing Parameter in the
past.
I have started to generate some Tutorial on this one, and if I do get
enough feedback I might proceed with some more data ...
Currently I have prepared a short Video describing DDR3 Data Setup and
Hold times, tVAC and tDIPW including some explanations on Eye Masks.
I'm still fighting with some video Codecs, but one version is available
on YouTube:
http://www.youtube.com/watch?v=-QzOEZMPhdQ
Once I have won the Codec fight the video will be available for download
on my website as well.
There are still some things in that I would like to change, so if you
find an error in there I can fix this as well.
Any kind of feedback is welcome, but I hope you find it useful ...
Best regards
Hermann
EKH - EyeKnowHow
Hermann Ruckerbauer
www.EyeKnowHow.de
Hermann.Ruckerbauer@xxxxxxxxxxxxx
Veilchenstrasse 1
94554 Moos
Tel.: +49 (0)9938 / 902 083
Mobile: +49 (0)176 / 787 787 77
Fax: +49 (0)3212 / 121 9008
schrieb Katkoria, Deepak:
> Thanks everyone for inputs..
> Here's the conclusion of the my question. I hope it will be helpful for new
> user.
>
> Concl:
> The Ac and DC levels are more usefull compare to Vref,Vih and Vil.
> AC/dc level provides a more accurate and realistic timing measurement for
> high speed signals. Due to which signal level and slew rates are clearly
> defined/measured by Vih ac/dc method.
> For validation, better margin and timing measurement, you can assume/chose
> whether to use a AC175 specification or AC150.
>
> Cheers,
> Deepak
>
>
>
>
> -----Original Message-----
> From: steve weir [mailto:weirsi@xxxxxxxxxx]
> Sent: Wednesday, August 04, 2010 4:19 PM
> To: Katkoria, Deepak
> Cc: si-list@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] DDR3 - AC parameter
>
> Deepak, how much research have you done on these topics?
>
> Katkoria, Deepak wrote:
>
>> Halo,
>> Presently, I am working on DDR3 interface.
>> I would like to know following things,(which are not explain in Std.)
>> 1. how to check the AC input logic high Vih(ac) in Oscilloscope??
>>
>>
> Do you have an oscilloscope and probing system that is up to the task?
> Do you have adequate probing access? If not, you can pretty much forget
> performing measurements at speed.
>
>> 2. For the Fly by architecture, which signal is less immune and need
>> extra care for routing on inner layer DQ or ADD/CMD
>>
>>
> When you work out your timing and noise budgets, and consider the launch
> and receiver references you will be in a position to plan your
> stack-up. For reference, study the Intel PC reference designs.
>
>> 3. I am getting lots of EMC emission on VTT plan for on board DDR3. What
>> could be the reason?
>>
>>
> Your bypass impedance is too high for the energy you are injecting.
> Whether the energy you are injecting, or your bypass is problematic or
> both depends on how (if?) you engineered your design. Have someone with
> suitable expertise look at your: emissions profile, schematic, and board
> layout to make recommendations. Hopefully you haven't designed yourself
> into too bad of a corner.
>
>> 4. Do you know the difference between AC175 and AC150??
>>
>>
> 25 mV.
>
>> 5. Why there is AC reading in high speed signals, upto know I have only
>> dealt with Vih(dc) and never used Vih(ac).
>>
>>
> Finite gain bandwidth product.
>
>> 6. why are they using AC rating with DC ratings??
>>
>>
> Same as above.
>
>> Cheers,
>> Deepak
>>
>>
>>
>>
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