[SI-LIST] DDR2 Clock question
- From: Bill Wurst <billw@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 22 Mar 2005 10:15:56 -0500
I am designing a motherboard with a DDR2 memory controller (266 MHz; 533
MT/s) interfacing to unbuffered DIMM modules. The recent discussion
concerning DDR2 signal reference planes was much appreciated. Based on
that discussion, my plan is to reference all DQ/DM/DQS signals to ground
planes (stripline), while the Address/Command/Control (ACC) signals
(also stripline) will be referenced to ground on one side and VDD on the
other. But I am puzzled by the differential clock signals of which
there are three pairs for unbuffered DIMM modules. The primary pair is
located in the middle of the ACC signals and all of the VDD pins, so it
probably makes sense to route them with the ACC signals referenced to
the same planes but assuming can get one into trouble. Then there are
the other two clocks, which are located in the DQ field amid the GND
pins. Could they be routed differently, referenced to different planes
on the modules? That's doubtful, since they all have they same timing
constraints.
Does anyone know to which plane the clocks are referenced on the DIMM
module? I have posed this question to both Micron and Infineon and have
not received an answer. Even though these are differential signals,
referencing the wrong plane is akin to crossing a plane split, creating
an inductive discontinuity with the potential for crosstalk to
neighboring signals and timing skew.
Does anyone have measurement data for the clock signals taken on an
actual motherboard that they could share?
Thanks for your help.
--
-Bill
_
_ <mailto:billw@xxxxxxxxxxx>
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
