I would like to simulate the DC resistance for PCB power plane. The value ( VDD-GND resistance) must be less than 0.3mohm from the noise requirements. So my idea to achieve this is increasing the number of power plane layer and copper thickness. Dose someone have any experience about modeling ? Simulator ? And I would like to know the model to hardware correlation about DC resistance. Thanks. Narimasa ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu