[SI-LIST] Re: Course annoucement: 3-day SI training in Stockholm by Lee Ritchey
- From: "Axcon/Rolf V. Ostergaard" <ro7@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 25 Sep 2009 14:37:37 +0200
All,
We are running a 3-day signal-integrity course in Stockholm with Lee
Ritchey.
The course runs Dec 1-3rd in Stockholm.
The early bird offer is valid throughout the end of this month, so now is a
good time to sign up.
And Stockholm once again proves to have all the action you can ask for:
http://edition.cnn.com/2009/WORLD/europe/09/23/stockholm.helicopter.heist/in
dex.html
// Rolf
--
Rolf V. Østergaard, M.Sc.EE.
Axcon ApS - The FPGA Power House.
Web: www.axcon.dk
Advanced hardware and embedded software development
FPGA & SI Training: http://www.axcon.dk/courses
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Axcon/Rolf
> V. Ostergaard
> Sent: 8. september 2009 12:00
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Course annoucement: 3-day SI training in
> Stockholm by Lee Ritchey
>
> Hi,
>
> We are running a 3-day signal-integrity course in Stockholm
> featuring Lee
> Ritchey. You may know Lee from this list or from his two
> books on signal
> integrity, but get in the room with him and you will learn a lot more.
> Seating is limited. Early bird discount thoughout September,
> so sign up now.
> The course runs Dec 1-3rd.
>
> Stockholm is a well connected airport, so with the airfare
> rates these days
> you can fly in from most of Europe at very low cost.
>
> Details on the web: www.axcon.dk/lee and below.
>
> And yes ? you can win an XBox if you attend... and there is a
> signal-integrity related story to tell about the XBox.
>
> Best regards,
> Rolf V. Ostergaard
> Axcon (www.axcon.dk)
>
> PS: If you just want a fun matchstick challenge, we have that as well:
> www.axcon.dk/challenge
>
>
> ====
>
> Title: Signal Integrity and High Speed System Design
>
> Venue: Clarion Hotel Stockholm, Ringvägen 98, Box 20025, 104
> 60 STOCKHOLM,
> SWEDEN.
>
> Dates: Tuesday December 1st to Thursday December 3rd, 2009. 3
> days total.
>
> Time: 9:00 to 16:00 all 3 days.
>
> Description:
>
> This highly practical course is designed to take the student
> through the
> entire process involved in designing and fabricating high
> speed PCBs. It
> begins with the fundamentals of electromagnetic fields and
> the behavior of
> transmission lines that are the basis for all high-speed
> signaling. From
> there, it examines all of the aspects of high-speed design
> leading to the
> development of a robust set of PCB design rules that accounts
> for power
> subsystem design, routing rules and design of PCB stack-ups
> as well as the
> fabrication rules needed to balance performance against cost and
> manufacturability.
>
> The materials and examples used in this course are drawn from
> actual designs
> of high speed systems in current manufacture. These examples
> range from
> video games to terabit routers and cover the complete range
> of designs. The
> design process presented is based on many years of completing
> designs that
> are "right the first time". Students are shown many ways to
> improve their
> design process so that designs meet this objective. Reliable
> methods for
> controlling and containing EMI will also be thoroughly covered.
>
> Part of the last day provides the participants with a unique
> opportunity to
> get specific input and solutions to pre-submitted design challenges.
>
> We encourage the participants to describe one or two specific design
> challenges, and submit it for Lee Ritchey to specifically
> address during
> this session!
>
> This course addresses the most common high speed problems, including:
>
> * Failures from crosstalk and reflections
> * Problems related to time delays in PCB traces
> * EMI failures
> * Failures stemming from poor power system design
> * Failures related to poor IC package design
>
> This course places special emphasis on very high speed differential
> signaling protocols such as XAUI, Hypertransport, PCI
> Express, Infiniband,
> SATA, SSCSI and others that are the backbone of modern
> computing with ever
> shorter risetime. Actual circuits are built and tested and
> then modeled to
> correlate modeling techniques. The topic of how to design
> power delivery
> systems capable of supporting these protocols is also addressed.
>
> Other subjects covered in this SI training by Lee Ritchey
> includes: eye
> diagram, eye pattern, IBIS and IBIS models, PDS design, logic
> levels, edge
> rates, rise/fall time, rocketIO, rapidio, capacitor types, resistor
> selection, capacitance, inductance and resistance of
> capacitors, crosstalk,
> impedance and impedance matching, transmision lines,
> propagation delay,
> termination resistor values, pcb stackup and much more.
>
> More information: www.axcon.dk/lee
>
> The course is arranged by Axcon.
> Silica, Mentor Graphics, Microsoft and Gateline/Cadence
> sponsors the event.
>
> --
> Rolf V. Østergaard, M.Sc.EE.
> Axcon ApS - The FPGA Power House.
> Diplomvej 381, DK-2800 Lyngby, Denmark
> Web: www.axcon.dk Tel: +45 4822 9266
>
> Advanced hardware and embedded software development
> FPGA & SI Training: http://www.axcon.dk/courses
>
>
>
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