Hi All, I'm trying to correlate some lab measurements to my simulations in Cadence PCB SI (SpectraQuest). I have a 400MHz unidirectional LVDS interface between two Xilinx devices that is terminated in 100ohms inside one of the devices. My lab measurements show a pretty good reflection occurring on the rising and falling edges of the waveform. I'm trying to determine if this is being caused by the ball to I/O pad trace length in the package (plus my BGA breakout). My simulation only shows a slight bend in the waveform rather than the non monotonic ring that I see in the lab. The bend does correlate well time wise (location on the edge) with the lab measurement. I don't really know much about the limitations of IBIS models so I'm wondering if some of the discrepancy could be due to that. FYI: I'm using the models that Xilinx "ibiswriter" puts out. The rise/fall times of the waveforms are in the neighborhood of 300pS. Thanks Steve ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu