[SI-LIST] Re: Conductor surface roughness
- From: Sukumar <sukumarm@xxxxxxxxxxx>
- To: scott@xxxxxxxxxxxxx, chockalingam.s@xxxxxxx, jeff.loyer@xxxxxxxxx, leeritchey@xxxxxxxxxxxxx, suresh.kondepati@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Sun, 9 Mar 2014 11:24:35 +0100
Hi All,
Thanks for your replies.
I got cu surface roughness from fab house as 0.2micron.
In the simulation software, there are two option for all layers.
1. Top surface roughness
2. Bottom surface roughness
What is the setup for micro strip, strip and dual strip trace?
Which surface (top/bottom) will affect more?
Thanks,
Sukumar
Chockalingam Selvaraj <chockalingam.s@xxxxxxx> wrote: Sukumar, For the
surface roughness numbers, get in touch with your fab house (its approx
2.2umfor a 1oz foil) Also check if your foil is reverse treated (RTF) Copper
foil selection depends on the maximum speed and the final application.
Regards Ck., -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Scott McMorrow Sent:
Thursday, March 06, 2014 11:08 AM To: sukumarm@xxxxxxxxxxx Cc:
si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Conductor surface roughness Use
H-VLP 2 copper to minimize surface roughness. On Thu, Mar 6, 2014 at 1:59
PM,Sukumar <sukumarm@xxxxxxxxxxx> wrote: >Hi Experts, >How can we minimize
the effects of conductor surface roughness on high >speed signals? >>What is
the copper surface roughness value for electro deposited copper? >>Please
share your ideas. >>>>Thanks, >Sukumar
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