[SI-LIST] Re: Compensation scheme in two-stage opamp
- From: Raymond.Leung@xxxxxxxxxxx
- To: "Guo Yawei" <ywguo527@xxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Thu, 20 Nov 2003 17:01:06 +1000
My apology of the typo; PSRR is not lesser but better. The whole
message is trying to state this. Sorry for your time and bandwidth.
regards,
Raymond
>From: Raymond.Leung@xxxxxxxxxxx
>To: ywguo527@xxxxxxxxxxx
>Subject: Re: [SI-LIST] Compensation scheme in two-stage opamp
>Date: Thu, 20 Nov 2003 14:35:37 +1000
>
>
>
>Likely this is the second time you have posted the same issue. I
>will try to contribute my 2 cents.
>
>If you have nmos input transistors in the first stage, then the load
transistors
>are pmos. If the decoupling cap is tied between the output of the 1st
stage
>and the vdd rail, then the PSRR of the vdd rail should be lesser than the
>Miller configuration because the noise coupled to the drain/gate of the
>diode-connected pmos will be in phase with the noise coupled to the
>1st stage output and they will cancel each other. Of course if the
>decoupling cap is connected to gnd the situation will be very different.
>
>Since this topic is a bit off SI we can discuss it offline.
>
>Regards,
>Raymond
>
>
>
>
>
>"Guo Yawei" <ywguo527@xxxxxxxxxxx> on 20/11/2003 12:27:06
>
>Please respond to ywguo527@xxxxxxxxxxx
>
>To: si-list@xxxxxxxxxxxxx
>cc: (bcc: Raymond Leung/sdc)
>
>Subject: [SI-LIST] Compensation scheme in two-stage opamp
>
>
>
>Hello,
>
>This is a question about frequency compensation scheme in two-stage opamp.
>
>The most direct and simple scheme in my opinion is Miller compensation.
>However, I have some confusions about the capacitors that I can use.
>
>First, if I use Poly to Poly cap, it is easy to emplement. The parasitic
>capacitor is small and has insignificant influence on the frequency
>response of the opamp.
>
>Second, to reduce cost I need to avoid poly to poly cap, the sanwich
>capacitor implemented with Metal1-Metal2-Metal3 is an alternative. Though
>its parasitic cap is small, it may occupy much larger area than poly to
>poly cap.
>
>Third, if I use MOS transistor as Miller capacitor, in which the bottom
>plate is tied to the output of the opamp. I want to know the nonideal
>influence of the parasitic cap on the frequency response of the opamp.
>
>Last, if I give up Miller compensation, just put a MOS transistor on the
>output of the first stage as compensation capacitor, in which the source
>and drain of the transistor are tied to ground. But it may deteriorate
>negaive PSRR. Though the opamp using Miller compensation has poor PSRR,
>this sompensation scheme seems to have worse negative PSRR than does
Miller
>compensation because it has a much larger cap which connect between the
>output of the first stage and ground.
>
>Who can evaluate the above compensation schemes, or advise any better
>compensation scheme?
>
>Thanks.
>
>Yawei Guo
>
>
>
>
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