FYI, I will be at PCB East on Friday October 18th teaching the following full-day tutorial: ** T5 SI at Gigabit Speeds: Keeping the Performance Up from Chip to Backplane Speaker: Scott McMorrow <http://www.pcbeast.com/speakers/index.html#mcmorrow> Prerequisite: A working knowledge of electronics theory and/or PCB design principles.** *At Gigabit speeds, good signal integrity and PCB routing become crucial to successful designs. This full-day course will expand on the basics of signal integrity engineering and routing to show the steps necessary for designing high-performance differential I/O card and backplane systems. Topics will include: material selection; board stack-up for impedance control; choices in differential signaling and routing; connectors and pin assignments; backplane design for speed; vias and stubs; along with routing and layer assignments. This course will emphasize practical examples based upon some advanced technical information. Attendees should understand the basics of signal integrity, impedance control and differential signaling.* To enroll, visit the PCB East conference web site: http://www.pcbeast.com regards to all, scott -- Scott McMorrow Teraspeed Consulting Group LLC 2926 SE Yamhill St. Portland, OR 97214 (503) 239-5536 http://www.teraspeed.com ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu