[SI-LIST] Clarification of test points definition -- IEEE802.3ap Annex69B Ref. Model.
- From: agathon <hreidmarkailen@xxxxxxxxx>
- To: si-list <si-list@xxxxxxxxxxxxx>
- Date: Tue, 20 Nov 2007 12:44:18 -0800
Hello,
It seems TP1,4 are intentionally vague.
tx block---TP1--conn--backplane--conn--TP4---rx block
TP1 "cuts" somewhere between backplane mated-connector and tx asic, and
similarly for TP4 and the rx side. The bkplane & connectors reside between
TP1 and 4.
Shouldn't TP1/4 exclude all tx/rx pcb elements?
Yet... TP1/4 would then include connector pads & a short lead-in on tx/rx
pcb side which, by definition, DOES have a partial tx/rx pcb stackup but I
assume that's ok.
Justification for excluding tx/rx pcb: the bkplane channel should be a
separate model so that plugins can be separately optimized and the backplane
w/ connectors standardized.
Lastly, why would the ieee propagate such "vaguery"? On a semantic basis
alone there's reason for disappointment:
Sec. 69B.2: "The backplane interconnect is defined between test points TP1
and TP4 as shown in Figure 69B?1." But TP1/4 don't define anything in the
figure (it's not made explicit what of the tx/rx pcb lies within 'backplane'
bordered by TP1/4).
I suppose I should assume that the vagueness is an implicit message: "It's
up to you, buddy.".
Thanks for any clarification,
John
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