email resumes to "lisa@xxxxxxxxxxx" Senior Signal Integrity Engineer Chelsio Communications is a top-tier venture backed fabless semiconductor firm developing the next generation of networking & storage infrastructure building blocks. In this key position, you will develop our next generation of networking products. Responsibilities include leading/managing a signal integrity team; designing, simulating, and debugging high-speed components of large, complex ASICs; pre-layout and post-layout signal integrity analysis; verifying the resulting signal quality in the lab; addressing signal integrity issues in board, package and circuit designs; evaluating IO buffers and other cells such as PLLs and DLLs from different semiconductor processes; circuit simulation; timing analysis; design reviews and all other signal integrity issues.=20 Requirements: 10 or more years of experience in a technology-driven semiconductor environment working with full or semi-custom digital and/or mixed signal CMOS circuits. Substantial experience in high-speed system design and multi-million gate ASICs is a must. Familiarity with all the standard semiconductor fabrication and /tool flows. Must have taped out various ASICs of substantial complexity and speed, preferably in high-speed communications for switches and routers. Must have a proven ability to set and meet product deadlines. Strong working knowledge of HSpice and other signal integrity tools such as XTK and Hyperlynx. Excellent understanding of signal integrity issues such as transmission line theory, EMI compliance and crosstalk analysis. Signal integrity analysis from ASIC level through board and system level, telecom/datacom experience preferably in packet based switching environments. Direct experience in the design and implementation of the physical layer of a high-speed, point-to-point interconnection such as SPI-4, Gigabyte System Network (GSN), InfiniBand or HyperTransport. The ideal candidate has significant commercial experience with networking, storage, and server semiconductor products, as well as experience with high-speed design. The highest priority will be given to the candidate who has a proven track record for developing original networking semiconductor products for the first time in a startup environment in record time. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu