[SI-LIST] Buried resister in High Speed Digital Design?
- From: "Inmyung Song" <imsong@xxxxxxxxxxxxxx>
- To: "Signal Integrity Mail Group" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 18 Jul 2001 14:02:57 +0900
Hello folks.
Is there anybody to know that what application support the Buried Reisistor?
I want to debug the board which has resistive layer in inner layer.
The stackup is below:
------------------- COMP
------------------- FR4
-------------------SIGNAL_2
-------------------Resistive Layer
-------------------FR4
-------------------GND
-------------------FR4
-------------------3.3V
-------------------FR4
|
|
...
How can I view the signal integrity in according to Resistive Layer?
Many tool is not supported the buried resister, is it right?
When I define the crosssection in tool, I have a big problem.
Signal_2 is conductor layer, and Resistive layer is conductor layer too. But
not defined.
They need a dielectric between Signal_2 and Resistive layer but not existed in
real world.
How can I set the crosssection in tool like that?
Thank you for your reading.
Any comment is good for me.
Inmyung.
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