Presumably to get more layers for the high speed differential pairs, as
well as meeting PDN requirements, whilst minimising the total layer count.
You can't locate the high speed differential pair layers on the upper
layers as most backplane pressfit connectors have a minimum depth.
On Tue, Sep 12, 2017 at 8:03 AM, Cheng, Chris <chris.cheng@xxxxxxx> wrote:
I am sorry, what exactly is the reason to need this strange stack up ?
Chris Cheng
Distinguished Technologist , Electrical
Hewlett-Packard Enterprise Company
+1 510 344 4439/ Tel
chris.cheng@xxxxxxx / Email
4209 Technology Dr
Fremont, CA 94538
USA
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Carson Au
Sent: Monday, September 11, 2017 2:50 PM
To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
Cc: corley@xxxxxxxxx; si-list@xxxxxxxxxxxxx; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Asymmetrical Stacks
This is the stackup I referred to in the original post.
https://bertsimonovich.files.wordpress.com/2011/01/image22.png
On Tue, Sep 12, 2017 at 2:06 AM, Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
wrote:
In 40+ years experience designing and manufacturing PCBs, I have yetare 12 mils!
to see warping caused by asymmetry. When I have seen warpage it has
been traced to fabricators using laminates and prepreg materials from
different suppliers in a single PCB.
One of the PCBs I pass around in my classes is 12 layers and the
prepregs and laminate near the top are 2 mils and those near the bottom
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Chuck Corley
Sent: Sunday, September 10, 2017 10:10 PM
To: carson.au@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx; si-list-bounce@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Asymmetrical Stacks
Are there any issues in manufacturing asymmetrical stackups?Yes, there often can be warpage problems when the stackup is
asymmetrical.
I couldn't see what you posted, but from the text description you
provided your stackup sounded fairly unbalanced. It's usually is best
to design a symmetrical stackup when possible. However when necessary
your fab vendor can tell you what amount of asymmetrical construction
they can handle, though this could lead to reduced yields and higher
costs. Talk with your fab vendor and get their advice; I think
they'll normally steer you towards a symmetrical stackup when it's
possible, but they can also tell you how far astray you may be able to
go with asymmetry if it's absolutely necessary.
Hope this helps.
Chuck
Chuck Corley
--
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receive news updates)
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http://ewbsonoma.org [1]
On 2017-09-10 21:40, Carson Au wrote:
Hi Experts,
Are there any issues in manufacturing asymmetrical stackups?
For example, the below sample stack from Bert's blog, locating the
think PDN layers on the upper layers, and reserving the thicker
cores and prepregs for the high speed differential pairs on the
lower side of the stack.
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