[SI-LIST] AW: XAUI Routing guidelines and plane considerations on next layers

  • From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
  • To: "Rama Mohan Reddy Boreddy" <mohan.svuce@xxxxxxxxxxxxxx>
  • Date: Mon, 9 Nov 2009 11:15:36 +0100

Rama,
 
high speed routing should be done with impedance controlled traces to assure 
proper signal transmission. Without impedance control you will see reflections 
and very likely EMI-Problems. 
There are several different ways to conrol differential impedance, like 
broadside coupling, edge coupling, stripline, microstrip... Each has its 
advantages and disadvantages. The most common for digital designs is edge 
coupled stripline, meaning the differential pair is routed parallel on the same 
layer, embedded between two Reference planes (mostly GND, but PWR can also be 
used). This also allows a clean GND-return path (as you know, there is GND 
current flowing in the gnd-planes right underneath the signal traces). 
 
There are ways to route without the GND-planes, but I can not recommend those, 
because it is too complicated to make those work as good as the stripline 
version. If you worry about routing space, and there are only a few signals to 
route, you can have the GND-plane in just that routing area, meaning you don't 
have to flood the complete next layer with copper when there are only a few 
signals are routed in one small area of the board.
 
Look for impedance calculator tools (like POLAR) for more information on 
impedance controlled routing. There are also a lot of application notes 
available from the big chip vendors.
 
BR
Gert

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Von: Rama Mohan Reddy Boreddy [mailto:mohan.svuce@xxxxxxxxxxxxxx] 
Gesendet: Montag, 9. November 2009 10:48
An: Havermann, Gert
Cc: si-list@xxxxxxxxxxxxx
Betreff: Re: [SI-LIST] XAUI Routing guidelines and plane considerations on next 
layers


Hi Gert,
 
    I understood. 
 
  I just want few general clarifications on high speed (XAUI, PCIe,HDMI, SATA) 
signal routing
 
a) Will it have any impact if we route the high speed signal with above and 
below layers as 
    ground. is it advantageous or disadvantageous of taking both above and 
below layer as   
    ground layers.
 
Rama 

On Mon, Nov 9, 2009 at 2:19 PM, Havermann, Gert <Gert.Havermann@xxxxxxxxxxx> 
wrote:


        Dear Rama,
        
        I do understand that you would like to get a complete list of 
guidelines to get you started quickly, but you also have to understand, that a 
lot of the guidelines everyone of us is using, are our own IP, and nobody wants 
to share his IP completely. SI-List and all its experts are happy to help with 
SI problems, or answering fundamental questions, but we will not give away all 
the knowledge we gathered over years.
        
        Questions for guidelines, and stitching vias have been asked in the 
past. You should browse the si-list archive:
        //www.freelists.org/archives/si-list
        I think you will find a lot of different guidelines there. If you like, 
you could collect these guidelines in a single e-mail and share it with the 
si-list!?
        
        Sorry for not beeing too helpful here. If you have detailed questions 
or you run into problems, I'll be glad to help, but I won't be doing you job 
(without beeing paid ;-))
        
        Good look
        
        BR
        Gert
        
        
        
--------------------------------------------------------------------------
        Absender ist HARTING Electronics GmbH & Co. KG; Sitz der Gesellschaft: 
Espelkamp; Registergericht: Bad Oeynhausen; Register-Nr.: HRA 5596; persönlich 
haftende Gesellschafterin: HARTING Electronics Management GmbH; Sitz der 
Komplementär-GmbH: Espelkamp; Registergericht der Komplementär-GmbH: Bad 
Oeynhausen; Register-Nr. der Komplementär-GmbH: HRB 8808; Geschäftsführer: 
Torsten Ratzmann
        -----Ursprüngliche Nachricht-----
        
        Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] 
Im Auftrag von Rama Mohan Reddy Boreddy
        Gesendet: Freitag, 6. November 2009 17:36
        An: si-list@xxxxxxxxxxxxx
        Betreff: [SI-LIST] XAUI Routing guidelines and plane considerations on 
next layers
        

        Hi Experts,
         In our product we had XAUI interface which runs at 6.25 Gbps. Please 
provide us the routing guide lines and any specific constraints on next layer
        
         In the existing product, they haven't routed any signals on the next 
layers. Even they haven't used any planes (Ground/Power) on the next layers.
        Is this requirement must?
        
         I saw that vias (Power/Signal) are stiched/used sorrounding the XAUI 
lines. Will taking signal vias close to XAUI signals will create any noise on 
the XAUI signals? I am expecting via might create high noise on the line which 
is close with in the differential pair than the line which is away from via.
        
        Regards,
        Rama Mohan Reddy
        
        
        
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