[SI-LIST] AW: Via Structure
- From: "Havermann, Gert" <Gert.Havermann@xxxxxxxxxxx>
- To: "marc-andre.filion@xxxxxxxxxxxxxx" <marc-andre.filion@xxxxxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 19 Apr 2012 14:30:33 +0000
Hi Marc,
PCB vendors always try to get easy accessible testpoints for their electrical
tests. In many of todays dense designs, the annual ring of a small via might
not be enough for repeatable connections, and then then enlarge the pads
(sometimes without notice... I hate that).
Sometimes they also enlarge pads to get a better thru plating.
The only Pitfall is, that this adds capacity to the via, and in some cases this
is not desirable.
Since you didn't order enlarged pads, and you didn't allow them to enlarge
pads, you can send the boards back and let them redo the PCB. Maybe they will
ask next time?
BR
Gert
Please visit us at the HANNOVER MESSE from 23rd to 27th of April 2012, in hall
11 at stand C13.
http://www.hannovermesse.de
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-----Ursprüngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] Im
Auftrag von Filion, Marc-Andre
Gesendet: Donnerstag, 19. April 2012 16:15
An: si-list@xxxxxxxxxxxxx
Betreff: [SI-LIST] Via Structure
Hi,
We had a funny surprise when we received the bare pcb of a prototype. The PCB
fab changed the via pad from a typical round shape to an enlarged square one.
It tickle our mind and came to a quick conclusion that it won't affect much the
signal integrity.
My question here is: Is this a more effective way to build PCB (in term of
yield)? Is there any pitfall related to this technique?
best regards,
Marc-André Filion, Eng | Hardware designer | Kontron Canada | T 450 437 5682
x2243 | E marc-andre.filion@xxxxxxxxxxxxxx
<mailto:marc-andre.filion@xxxxxxxxxxxxxx>
Kontron Canada Inc
4555 Rue Ambroise-Lafortune
Boisbriand (Québec) J7H 0A4
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