[SI-LIST] Re: A question about how fast the step pulse we need in measuring impedence
- From: "Tony Dunbar" <tony.dunbar@xxxxxxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 1 Aug 2008 10:26:20 -0500
IMHO, there's a balance needed here and the rise time should suit your
application. The same situation often arises in simulation whereby model
edge-rates that are much faster than exist in the actual hardware can be
used either by oversight or by over-eagerness. The results can scare the
pants off you and have you chasing fixes that aren't required or aspects
that can't be changed easily. On the other hand, don't use an edge-rate
that's too slow as that will miss what the actual hardware experiences.
Perhaps an edge-rate of, say, 150ps might be appropriate if that covers the
FAST corner of your actual, real condition or what the board might be
expected to handle in the future if you want to avoid redesign to get it
there.
Tony
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of huang.jian2@xxxxxxxxxx
Sent: Friday, August 01, 2008 5:50 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] A question about how fast the step pulse we need in
measuring impedence
Must we need to filtering the default step pulse that the impedence
analyer generates so that the rise time of the filtered step pulse
is matching the real condition in the transmission line? For example, the
default rise time of step pulse that that the impedence
analyer generates is 70ps, and the real rise time of applicable high speed
signal in the tranamission line is 200ps.
What if the default step pulse with rise time of 70ps used in measuring
iimpedence?
Thanks in advance
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