[SI-LIST] Re: 8 Layer stack up

  • From: Ravinder.Ajmani@xxxxxxxx
  • To: msalami@xxxxxxxxxx
  • Date: Mon, 7 Jul 2003 08:54:33 -0700

Mehrdad,
Any copper fill on Top and Bottom layer will have too little inter-plane 
capacitance (due to large separation from Power/Ground planes) to be of 
significance.
Regards, Ravinder
Server PCB and Flex Development
Hitachi Global Storage Technologies


Email: Ravinder.Ajmani@xxxxxxxx






"Mehrdad Salami" <msalami@xxxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
07/03/2003 05:39 PM
Please respond to msalami

 
        To:     "'[SI-LIST]'" <si-list@xxxxxxxxxxxxx>
        cc: 
        From:   si-list-bounce@xxxxxxxxxxxxx
        Subject:        [SI-LIST] Re: 8 Layer stack up





Hi Ravinder,

Is there any reason not putting fill for the top and bottom layers. In
this example the top layer with Power and bottom layer with Ground.



Mehrdad Salami

Hardware Design Engineer
Colour Vision Systems

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ravinder.Ajmani@xxxxxxxx
Sent: Friday, July 04, 2003 1:38 AM
To: nagaraj@xxxxxxxxxxxxxxxxxxxx
Cc: [SI-LIST]
Subject: [SI-LIST] Re: 8 Layer stack up

Nagaraj,
The stackup provided in your note will provide good power plane 
decoupling, but will cause wiring nightmare because of coupling between 
three signal planes on each side of the Power/Ground planes.  Also,
traces 
on Top and Bottom layers will be too far removed from the shield planes,

resulting in excessive crosstalk and EMI.  If you can have only two 
Power/Ground planes then you may try the following stackup:
Top
Signal     <-  Fill with Ground
Power
Signal     <-  Fill with Ground
Signal     <-  Fill with Power
Ground
Signal     <-  Fill with Power
Bottom
The middle two signal layers should be used for routing high-speed
signals 
for EMI reduction.  In order to decouple the power supplies, you should 
fill empty space on planes adjacent to Power and Ground planes with
Ground 
and Power shapes respectively.  However, make sure that it does not
impact 
impedance of signals on adjacent layers.  Also, avoid overlapping power 
supply shapes of different voltages.
This is my $0.01.
Regards, Ravinder
Server PCB and Flex Development
Hitachi Global Storage Technologies

Email: Ravinder.Ajmani@xxxxxxxx






"Nagaraj" <nagaraj@xxxxxxxxxxxxxxxxxxxx>
Sent by: si-list-bounce@xxxxxxxxxxxxx
07/03/2003 12:19 AM
Please respond to nagaraj

 
        To:     "[SI-LIST]" <si-list@xxxxxxxxxxxxx>
        cc: 
        Subject:        [SI-LIST] 8 Layer stack up




Hi Gurus,
What will be the Best Layer Stack up for 8 Layer Board,
Constraint is we can have only 2 Planes,

Top
Signal
Signal
Power
GND
Signal
Signal
Bottom

Board Construction with Through Hole Vias

Please Comment on this.




Nagaraj
Research Engineer
nagaraj@xxxxxxxxxxxxxxxxxxxx

Embedded Wireless Labs Sdn Bhd
www.embeddedwireless.com


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