[SI-LIST] Re: 2.24 Gb/s over standard 2mm HM connectors?
- From: Bob Sullivan <bsullivan@xxxxxxxxxxxx>
- To: "'matusov@xxxxxxxxxxxx'" <matusov@xxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Fri, 18 Mar 2005 17:57:49 -0500
Mikhail,
We performed signal integrity simulations for various CompactPCI switch
fabric architectures using the 2MM connectors:
PICMG 2.16 (10/100/1000 Base-T Ethernet)
PICMG 2.17 (StarFabric SERDES at 622 Mbps)
PICMG 2.18 (Serial RapidIO SERDES at 1.25 Gbps, and 2.5 GBPS also studied)
We have also performed signal integrity studies for a number of custom
backplane interconnects in these same frequency ranges.
One major issue with the 2MM connector is that it was not originally
designed to operate at these high rates, and there is a very wide variation
in electrical characteristics from one vendor to another, in terms of both
crosstalk and impedance. With the worst vendors that we have seen, 1.25
Gpbs is marginal, so 2.5 Gbps would be problematic.
If you are willing to surround the active pairs with grounds on all sides,
restrict the SERDES rise times, and restrict the connector vendors to only
the best ones, then 2.5 Gbps might be possible, depending on your specific
SERDES characteristics. Note that fast SERDES rise times will exascerbate
the connector problems.
If you plan to go down this path, signal integrity simulations should be
performed. The major connector vendors all have SPICE models that you can
get under NDA, but the last time I checked, only a few vendors had models
that were characterized for fast rise times.
Regards,
Bob Sullivan
Vice President and Corporate Director of Technology
Hybricon Corporation
12 Willow Road
Ayer, MA 01432
Tel: 978-772-5422 x250
Fax: 978-772-7570
Cell: 978-502-0948
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Mikhail Matusov
Sent: Friday, March 18, 2005 5:45 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] 2.24 Gb/s over standard 2mm HM connectors?
Dear experts,
I am designing a system where two Xilinx FPGAs on 2 separate PCBs will be
connected with a differential serial 2.24 Gb/s RocketIO link. The cards are
so called front and rear Compact PCI cards and are expected to go into a
standard PICMG 2.16 chassis. Thus, they will be connected with a 2mm Hard
Metric "pass-through" connector. In other words there will be a backplane or
rather a midplane between the cards, but no tracks on this midplane, the
signals will pass directly through the vertical male connector pins sticking
out on both sides of the plane, while each of the cards will have a right
angle female connector.
My questions are as follows:
1. Has anyone done this successfully?
2. Which connector pins should I use for signaling and which for GND?
3. Can I get away without simulating this? If not, could someone please
point me to where I can get appropriate SPICE(?) models for the connectors?
Thanks,
=======================
Mikhail Matusov
Hardware Design Engineer
Square Peg Communications
Tel.: (613) 271-0044 ext.231
Fax: (613)271-3007
http://www.squarepeg.ca
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