[SI-LIST] 1) Winnersh UK: Free joint seminar from Agilent, Xilinx, Elpida, MathWorks, NXP 2) Free Agilent Webcast in European time zone
- From: <colin_warwick@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Mon, 12 Jan 2009 07:15:24 -0700
Hi,
I've been posting notices about our US events and getting messages saying
"Thanks, but how about events for Europe?" Well, here are two, one live, one
web-based.
Enjoy!
-- Colin
1) Live event, Winnersh UK: High Speed Digital Design Symposium
Wednesday 21 January 2009
08:30 - 17:15
Register: www.agilent.co.uk/find/HSDDS2009
Note: the above link seems to sometimes fail if the cookie on your computer
from Agilent.com is not set to a UK location. A workaround 'til we fix this is
to first go to:
http://www.home.agilent.com/agilent/morecountries.jspx
...and set your location to UK.
ABSTRACT
Join our complimentary symposium and hear from leading technology companies on
the latest High Speed Digital, Signal Integrity, Serial Bus, FPGA and Memory
technologies and trends.
Guest speakers from Agilent Technologies, Xilinx, Elpida, The MathWorks and NXP
Semiconductors will share with you test challenges, measurement theory and
innovations on topics such as DDR Memory, High Speed Serial Bus and Jitter
Analysis, FPGAs, PCI Express(r), Fast Interconnect Analysis and Simulation,
developing Customised Measurements, Instrument Connectivity and Digital
Wireless. We'll also spend time discussing emerging market and technology
trends, and you'll learn about recent breakthroughs in test technology that
enable designers to tackle their greatest high-speed digital design and
validation challenges more efficiently and effectively than ever before,
helping you to get your products to market faster.
2) Live Webcast: Back to Basics - Measurement-Based Channel Modeling For Signal
Integrity Using Agilent ADS
Thursday 15 Jan 2009
Begins 14:00 UK time, 15:00 Central Europe Time
Register: http://tinyurl.com/si-euro
Abstract
In this webcast, we'll demonstrate a rapid technique for "what if" analysis for
signal integrity applications.
We first automatically fit an ADS circuit model to measured data, using a Tyco
XAUI backplane as an illustrative example. Next, the circuit model is used in a
series of "what if" simulations to that show what configuration changes will
lead to the required performance. Examples include changes to the loss tangent,
the via design, and daughter card/backplane trace impedance matching, and
combinations of all three. This technique is a much faster and more thorough
approach to explore the design space than "iterating the hardware to success."
(If you don't need the live Q&A, the on-demand version is still available at:
http://tinyurl.com/ads-on-demand )
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