Does anyone know what values I should be using for addressing on the
various LPDDR2 chips? The SD_SB register describes the addressing and
has 2 bits for rows, 2 bits for columns and two bits for "banklow". It
seems that 0x2, 0x1, 0x2 is the safe set of values used by
bootcode.bin but it only allows addressing up to 256MB of RAM, beyond
that I get a bus error VPU exception. When setting columns to 0x2 I
can address 512MB of memory on the Hynix 512MB chip in my RPi 1 too
but I'm still using the same timing parameters so I'm wondering if
changing addressing without adjusting timing has negative implications
for reliability.
Also, what parameters would need to be used for Elpida/Samsung 1GB
chips in RPi2 and RPi3? The safe ones work on there for addressing up
to 256MB, but I haven't tested 0x2/0x2/0x2 but I'm assuming it might
be slightly different there.
Also, it seems that the bootcode uses 7.8 as tREFI while the spec
recommends 3.9 for those chips, is that a problem? I'm not familiar
enough with LPDDR2 to know.
