[nasional_list] [ppiindia] The new gospel of chip design

  • From: rahardjo mustadjab <bapakjewel@xxxxxxxxx>
  • To: apakabar@xxxxxxxxxxxxxxx, ppiindia@xxxxxxxxxxxxxxx
  • Date: Sat, 5 Feb 2005 06:10:11 +0000 (GMT)

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The new gospel of chip design

Semiconductor makers are embracing an open-source
approach that could revolutionize their business. 
January 31, 2005 Print Issue

During the last weekend of October more than 600
representatives from nearly every corner of the
semiconductor industry gathered at an invitation-only
meeting at a New Delhi hotel to witness the birth of
what is being described as ?the Linux of the
electronics industry? or ?the people?s chip.?

The global initiative could shake the sector to its
core, creating a lucrative new line of business that
would help extend the lifetime of chips and allow a
broader set of applications to be placed on a single
chip. Manufacturers would benefit since the initiative
aims to help cut costs and design times for the
producers of everything from consumer electronics to
networking and communications equipment.

Consumers stand to win, too, because more flexibility
in chip design allows functionality to be added to an
existing product on the fly, meaning it would no
longer be necessary to buy a hardware add-on or a
whole new product to benefit from the latest feature.

The idea is to pool software and hardware knowledge to
solve one of the electronics industry?s greatest
challenges: finding an economic way to power and
reconfigure consumer electronics devices like game
consoles and home media players in a fast-paced
market.

 

Asians, Americans, and Europeans attending the New
Delhi event shimmied to Indian music by torch light at
night, donning leis of flowers over their suits and
ties to celebrate. But achieving their goal will
entail more than getting industry players to dance
together; it will require a radical new approach to
system design and implementation. 

 

?Whoever does this well first will establish a true
killer product and business, rivaling Intel?s success
in the earlier microprocessor wave,? says New Delhi
conference speaker Malcolm Penn, CEO of Future
Horizons, a semiconductor consultancy.

 

The bet is that the global movement launched in New
Delhi called generalized open-source programmable
logic (GOSPL) will allow more than one company to win.


 

If it works this initiative could become the new
digital DNA of the electronics industry, adding
programmability to flexible logic devices called field
programmable gateway arrays (FPGAs),
application-specific integrated circuits (ASICs), and
application-specific standard products (ASSPs), which
combined represent a $100-billion market. 

 

Seeding the effort

At the New Delhi conference STMicroelectronics seeded
the effort by promising to release?for free?a million
lines of its code for creating FPGAs, which sources
say amounts to an investment of $50 million.

 

ST declined to comment for this article, since GOSPL
is still under wraps, with another conference
scheduled for March 31 and April 1 at the Swiss
Federal Institute of Technology in Lausanne,
Switzerland. 

 

But Geneva, Switzerland-based ST is only one of many
players expected to participate in GOSPL. EE Times, a
trade publication, recently polled its readers on
whether they would be likely to adopt an open-source
platform for programmable logic.

 

Just over 78 percent of the 222 respondents said yes.
Among those responding to the online poll was Tsugio
Makimoto, a respected industry figure who acts as a
corporate advisor for Sony Corporation?s semiconductor
business. ?There is a possibility that a new wave will
be created by GOSPL in programmable technology, once
it is properly implemented,? Mr. Makimoto, who spoke
at the New Delhi conference, wrote in response to the
online poll.

 

Using the Linux model as a parallel, the vision is
that by freely opening up the source code to industry
and academia the global GOSPL movement will add to and
improve the available code and eventually mirror the
15 to 20 million lines of code developed by Xilinx and
Altera, the two U.S. companies with proprietary
products that currently dominate the FPGA market, one
of the fastest-growing areas of the semiconductor
sector.

 

?It?s a real gutsy play,? says Robert Jelski, venture
capital firm 3i?s London-based global sector head of
electronics, semiconductors, and advanced
technologies. ?What it does is throw a nice-sized
stone into the quiet pond of the FPGA market dominated
by Xilinx and Altera. Now we have to see which way the
ripples go.?

 

While Xilinx is dismissive of GOSPL, the movement
could create a major ripple effect, according to
dozens of interviews with semiconductor executives,
venture capitalists, and academics. It could
commoditize the FPGA market, creating another
environment for programming Xilinx and Altera?s chips,
forcing them to become silicon providers and putting
downward pressure on prices, says Bruce Huber,
London-based managing director of Broadview?s European
investment banking.

 

But the overall impact is much bigger: By extending
the lifetime of a chip and allowing a broader set of
applications on a single chip, GOSPL could help usher
in so-called multipurpose system?on-chips (SOCs),
something the consumer electronics industry
desperately needs.

 

?The consumer electronics industry is grappling with
shorter and shorter product cycles. If GOSPL can offer
an economical way of doing flexible logic on [an SOC]
then all of a sudden if a new compression format such
as MP3 is hot, you can add it without having to spin a
new chip to do that,? says New Delhi conference
speaker Dominique Pitteloud, a venture capitalist at
Switzerland?s Vision Capital and a member of the GOSPL
advisory board.

 

If the chip industry can start offering more compact
and speedier solutions to a large number of niche
markets, ?it will actually accelerate the propagation
of silicon across our society,? says Mr. Jelski, who
also spoke at the New Delhi conference. That?s not
all?by making it possible for almost any player to
produce solutions, ?the chip industry model becomes
closer to the software model, which is much more
capital efficient,? he says. 

 

Those that contribute to GOSPL are expected to get a
smaller piece of a much bigger pie, selling more
silicon as demand for reprogrammable chips skyrockets,
say industry observers. Already other chip companies
are saying they are seriously considering integrating
GOSPL into their own products. 

 

Advanced Micro Devices (AMD) could embrace GOSPL, says
Robert Ober, an AMD fellow in the company?s Office of
Strategy and Technology. ?In our embedded, low-end
products there is always the need to tweak things?it
is just not practical to spin a new device for every
customer,? says Mr. Ober, who spoke at the New Delhi
conference. 

 

?This could crack open the ability to do smaller
production runs and more tailored products.?

 

IBM, for its part, has not endorsed GOSPL. However,
the company, which has a nonexclusive relationship
with Xilinx to use that company?s embedded FPGA core
in its ASIC library, is ?interested in exploring the
implications of the technology,? says New Delhi
conference attendee Fram Akiki, director of strategic
product offerings foundry and manufacturing services
for IBM?s Systems and Technology group.

 

So far, academics and researchers numbering in the
thousands have applied for free GOSPL licenses, which
require any innovation to be fed back into the
community. A university in India is set to begin
teaching GOSPL classes this month and a U.S.
university is planning to do the same.

 

Tackling a major headache

GOSPL has the industry?s attention because it is
targeting a major headache. The semiconductor industry
is no longer PC-centric: the new wave of demand is for
digital consumer devices and networks. Makers of
consumer electronics need to get their products on the
shelf in time to get a good price and earn healthy
margins. 

 

If the market takes off, they have to quickly ramp up.
If a new fad or need suddenly emerges, the same
product might have to be tweaked to add a new feature
such as an ADSL connection for game consoles.

 

As consumers become increasingly demanding and fickle,
the entire cycle?from introduction to ramp-up to
pulling the plug?can take place within 12 months or
less, hardly making it worthwhile to pay the tens of
millions of dollars it currently costs to design a
chip for a specific product or application. 

 

That is why companies like Sony want the same basic
chip design that works inside one product?such as its
handycam video camera?to work in other consumer
electronics products as well. 

 

SOCs are ideal for such consumer devices because they
combine everything on a single platform, quadrupling
the performance while lowering power consumption and
the number of chips needed. But making SOCs that are
standardized in manufacturing but reconfigurable by
application is easier said than done.

 

The problem is that Moore?s Law and current design
practice extrapolate into infinitely more complex
chips at an infinitely high design cost, says Future
Horizons? Mr. Penn. Though progress has been made,
none of the current options on the market, including
some types of ASICs and FPGAs, come near to solving
the problem, according to industry observers. 

 

ASICs are too expensive for anything other than
high-volume applications. FPGAs, widely used
semiconductor components that can be configured by end
customers as specific logic circuits, enable shorter
design cycle times and reduce development costs, but
are too expensive and consume too much power to be
used in most consumer electronics devices. Today FPGAs
are used in hefty pieces of equipment like mobile base
stations, ATM switches, or routers. 

 

FPGAs may have the advantage of being 100 percent
programmable but the cost of an FPGA chip?around
$300?is about the same as the price Sony PlayStations
sell for in stores.

 

The ideal would be to produce FPGAs that add five
percent to 10 percent flexible logic, with the rest of
the SOC being taken up by fixed logic. This would be
enough to allow consumers to simply download all they
need to add an ADSL connection to their game console
instead of having to plug in extra hardware. Adding 10
percent flexible logic would increase the cost by
around 20 percent but that is a price that consumer
electronics manufacturers would be willing to pay, say
industry observers. 

 

GOSPL?s approach is one way of doing that. ?The key
thing is where you put the flexible logic on the
chip?that is where GOSPL may or may not have it
right?do you limit it to just part of the chip or
spread it around? Nobody knows yet,? says Mike Bryant,
an analyst at Future Horizons.

 

Parallels to Linux

Pooling the talent of researchers and companies around
the world may be a cheaper and quicker way to find the
right answer. The GOSPL movement is the brainchild of
ST?s Rahul Sud, a native of India who worked for
Intel, INMOS, and Signetics before founding Lattice
Semiconductor, a successful programmable logic
company, in 1983.

 

At INMOS Mr. Sud was credited with helping
revolutionize the fast static random access memory
(SRAM) industry, pioneering a chip called the IMS1400,
which took 90 percent of the world market share,
eliminating Intel?s dominance in the fast SRAM market.


 

As founder and CEO of Lattice he pioneered the
development of generic array logic (GAL), an
electrically erasable general programmable logic
device, taking 100 percent market share away from
bi-polar fuse links programmable logic devices. 

 

Mr. Sud is now a group vice president and general
manager at ST. After setting up ST?s Flash Memory
division, Mr. Sud launched an SOC system software
development group for the company in India. His latest
venture is the creation from scratch of a new FPGA
division in ST. That division has been instrumental in
creating the source code donated to the GOSPL
platform, which is supposed to commoditize
reconfigurable field programmability on every type of
SOC. 

 

While GOSPL began as an ST initiative, the GOSPL
advisory committee is comprised of academics as well
as industry players from a wide variety of backgrounds
and companies, including the former head of research
and development at Synopsis and the former head of
Lucent?s FPGA ORCA project.

 

As an industry-wide initiative there are a number of
parallels to the Linux movement. ?Like in the
Microsoft world there are a number of people
dissatisfied with the closed environment of Xilinx and
Altera for multiple reasons and they would welcome
something like this, so in that sense there is a
tremendous analogy with Linux,? says 3i?s Mr. Jelski.

 

But unlike Linux, ?no one is going to come home from
their day job and write industrial-strength electronic
design automation tools in their spare time,? says Ulf
Schlictmann, head of Germany?s Institute of Electronic
Design Automation in Munich and a speaker at the New
Delhi conference. ?You are not going to attract
thousands of amateurs.?

 

When Linux started it was greeted with a high amount
of skepticism and it took ten years for commercial
models to fully develop.

 

But having seen the success of open source in
software, members of the semiconductor industry are
more likely to believe that it can and will happen in
FPGAs, accelerating development. ?With GOSPL, from the
beginning, industry players are more likely to think
?I can see money being made and I can start my own
little business here and I might get some backing,??
says Mr. Jelski.

 

Carpe diem

Take the case of Umesh Sisodia, an electronic design
automation (EDA) software development engineer for
Cadence Design System in Noida, which is just outside
New Delhi. Mr. Sisodia, who attended the New Delhi
conference, says he has submitted notice to Cadence
and personally applied to get a GOSPL license so that
he can build his own company around the movement.
?GOSPL opens up a lot of opportunities for
entrepreneurs,? he says. ?I am very keenly waiting for
the license.?

 

GOSPL could in fact help bootstrap India?s burgeoning
semiconductor industry. Large, established Indian
companies such as WIPRO are likely to benefit from
GOSPL because it will herald a shift toward SOC design
as a service, says David Kenyan, who until recently
was a senior strategic investment manager for Intel
Capital in Bangalore and now is working in China for
Infinity Ventures, which is part of IDB Group,
Israel?s largest industrial body.

 

Meanwhile, academics at universities in Asia, Europe,
and the U.S. say they see GOSPL aiding their research
projects. 

 

?There are other open-source toolsets but I think this
would be the first time that a complete
commercial-level tool chain for FPGAs is made
completely available together with architectural
details,? says Paulo Ienne, a speaker at the New Delhi
conference and a professor at Switzerland?s Swiss
Federal Institute of Technology?s School of Computer
and Communication Sciences. 

 

?There is a serious motivation for academics to move
in.? The upcoming GOSPL event, which will take place
on the Lausanne school?s campus, will include
roundtables with top industry executives, general
sessions about the GOSPL initiative, academic panels,
and a venture capitalist track addressing the
investment opportunities around GOSPL. 

 

In addition, a parallel track organized by the
European Tech Tour Association will introduce the Top
20 emerging European semiconductor companies (see
www.gospl.org for details).

 

Hurdles ahead

Still, it would be a mistake to underestimate the
hurdles ahead. A long list of industry players have
tried and failed in the FPGA market. Xilinx believes
that GOSPL doesn?t have a chance.

 

?Of all the things I worry about, this is not one that
keeps me up at night,? says Sandeep Vij, Xilinx? vice
president of global marketing. ?I don?t think [GOSPL]
will have much impact for a couple of reasons. The
first one is that there have been many attempts to get
into the programmable logic business over the last 15
years and every one has failed.... The battlefield is
full of casualties.? 

 

Another reason to doubt GOSPL is that there is a very
tight coupling between the design software and every
new architecture that is developed in programmable
logic, he says. 

 

?This is not and will never be a purely silicon play,
there needs to be tight interaction with the software
and the architecture. Both of them have to be
co-developed together,? says Mr. Vij. 

 

The hardware changes every year and if GOSPL doesn?t
have the resources to develop the most advanced
process technology, the software won?t matter, he
says.

 

Plus, Mr. Vij argues, all of the software design has
to be adapted for the new architecture, so anything
generic would quickly become out of date. And, because
each one of the FPGA architectures is very unique, the
basic logic block and the system-level functionality
are different. ?If you try to have something generic
it simply means you will develop something incredibly
inefficient,? he says. 

 

Vision Capital?s Mr. Pitteloud argues that GOSPL,
which includes both software and hardware, is not
planning on trying to crush Xilinx and Altera. It is
targeting a part of the market that these companies
are not currently addressing, reprogrammable logic for
SOC, a sector that has enormous potential, according
to analysts. 

 

?With smaller geometry, area efficiency will become
less of an issue, but what will be important is design
flexibility and power consumption, areas where GOSPL
has strengths over existing solutions,? says Mr.
Pitteloud. 

 

GOSPL maintains that open source will enable
innovation at a faster pace. But that depends on how
many players get on board. ?ST has put in the
investment to get the market going and that is really
admirable,? says Future Horizons? Mr. Bryant. ?Now the
industry needs to pick up the ball and run with it.?
 




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  • » [nasional_list] [ppiindia] The new gospel of chip design