Dwayne
As you pointed out, the crosstalk is ultimately limited by inter-channel
crosstalk inside the chip. However, most layouts I've seen don't handle trace
isolation very well. I found that by only using the 2 outputs that are farthest
apart on the chip, it was fair. I forget the exact numbers, but I think I have
a screen capture somewhere. As to buffering, I don't see how that will
accomplish anything except increase power consumption and complexity. It is
possible it will let you turn down the chip's internal drive level, but I doubt
that will have any affect. I might very well be wrong about that, so I look
forward to your tests.
Joe
Sent from my Verizon Wireless 4G LTE Tablet
-------- Original message --------
From: DuWayne Schmidlkofer <duwayne@xxxxxxxx>
Date: 06/01/2016 8:15 PM (GMT-05:00)
To: minima@xxxxxxxxxxxxx
Subject: [minima] Re: looking for HF1
I have been looking into the issue of using all 3 clock outputs of the
si5351. The crosstalk is caused by all 3 output clocks on the same chip
substrate. Using analog amplifiers and balun transformers just amplifies
the cross talk. I want to try some digital circuitry to try and reduce
it. Just ordered some NC7SZ04M5X single channel UHS inverters.
Hopefully with having a separate inverter as a buffer for each clock I
can eliminate most of the crosstalk. As for the DBM, if you use some of
the SMD diode pairs you can improve matching and reduce size. Also
switch to Schottky diodes instead of the silicon 4148s I see in many
designs will reduce the amount of drive needed for the DBM The SBL1 and
ADE1 DBM use Schottky diodes Should not bee too hard to layout a small
board with the SBl-1 footprint that you can build a homebrew DBM and
just plug it in the same board location
DuWayne
KV4QB.blogspot.com
On 6/1/2016 6:45 PM, Ben Aupperlee wrote:
Hello Ashhar,
I had some exchange of idears about SMD and modules, so here a new
version with a new drawing, the old .gif is also used in this temp.htm text.
Regards Ben PA9B (in Turkije)
