Mark,

 

What is the bottom soldermask for the _1_8.pad and the top soldermask for the _13_20.pad set to.  I believe they should be NULL though I am not sure if this will solve your problem.  The last time I was forced to use B/B vias was with v14.2

 

The Default Internal Layer is a time saver for thru vias, in that you do not have to define all the layers of your board in the padstack.  If your padstack just has the TOP, BOTTOM, and DEFAULT INTERNAL defined, allegro will copy the internal definition to all of the internal signal and plane layers defined in the PCB.  For thru vias you can delete the other internal signal and plane layers defined in the padstack dumped from the BRD file.

 

Cheers!
Drew

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From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Wednesday, May 10, 2006 7:55 AM
To: Cadence User Group
Subject: [PCB_FORUM] Blind Via (LAYERS 1-8) and (LAYERS 13-20)

I have Blind Vias (LAYERS 1-8) and (LAYERS 13-20) stacked on top of each other.
I also have mask to mask clearance in constraints set to 4 mil.
Problem is that I get Mask to Mask DRC for overlapped top and bottom blind vias.
Mask for top via defined on top.
Mask for bottom via defined on bottom.
In Padstack definition Xsection not showing all layers.
Also, what is Default Internal layer there for?

Any input about the BB definition and / or Mask to Mask violations?

Thanks,
Mark

Please see attached definitions.







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