[PCB_FORUM] Re: Bga pins sharing vias
- From: "richard moffat" <richard.moffat@xxxxxxxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Tue, 07 Sep 2004 09:16:14 +1200
Hi
There are a lot of issues there, and I wouldn't like to give advice
that tries to cover all situations or with the minimal amount of
information you've given. However, what I would say is:
1 - try //www.freelists.org/archives/si-list . You're bound to
get a lot of advice if you sign up and ask the question there (again,
with a few more details).
2 - just because it's the same voltage on two adjacent pins on a
device, it doesn't mean they're on the same circuit internally. You may
be drawing power from another circuit inside the silicon. This can be
hard to tell from the datasheet, so contact the chip manufacturer with
your question. They will also probably want to know the stackup you are
using.
3 - the more power pins you share, the more ground bounce you are
risking. This _may_ be compensated with: more high-frequency caps;
more vias from the caps (stated below); nice meaty planes between
power pins and cap pins; moving the vdd power plane inside the stackup
as close as possible to the underneath of the component.
I've probably raised more questions than you wanted!
Cheers,
Richard
>>> trilok.budathoki@xxxxxx 6/09/2004 5:24:32 p.m. >>>
Jean,
We have shared power pins in many of our boards in past, didn't face
any problem & the boards were thru in 1st shot. Try to put more than one
via for decoupling caps.Thus will reduce inductance. I assume you have
enough bulk caps around BGA.
Hope it helps
Trilok
-----Original Message-----
From: Jean Bratton [mailto:jean.bratton@xxxxxxxxxxxxxx]
Sent: Saturday, September 04, 2004 4:23 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Bga pins sharing vias
Hi all,
I have a board we're looking at the possibility of sharing a single
through-hole via between two, possible three, power or ground pins. Has
anyone any experience with doing this? Here is my engineer's
concern...she's pretty much determined that she's going to let me do it,
but I wanted to know if any of you have any negative experience doing
it. Or, conversely, if you do it all the time with high speed nets and
never have a problem.
Thanks,
Jean
The problem would be that when there is high speed switching, the
voltage pins that are sharing the vias will draw current through the
same via at the same time, resulting in a localized voltage noise around
the via. This noise will be more localized (hence somewhat higher
spike) then when there are two vias. The decoupling caps will try to
provide the needed current, and combat the voltage noise. But due to
the inductance associated with the caps, there will be a time delay
before the needed current can be provided to the device voltage pins, so
some noise remains.
Jean Bratton
Sr. Printed Circuit Designer
Freedom CAD Services, Inc.
603-864-1300 x1349
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