[PCB_FORUM] Re: Allegro 15.1: Shorting nets

  • From: "Jonathan Friedman" <jf@xxxxxxxxxxx>
  • To: <icu-pcb-forum@xxxxxxxxxxxxx>
  • Date: Thu, 26 Aug 2004 11:45:47 -0700

I use Capture CIS (9.2 <-- yeah, I know I'm behind). If I'm going to make
the short on a component layer, I found a quick way to do it is to draw a
0-ohm resistor between the two nets. The resistor's assigned footprint is
just a very short wire segment. Solves all your DRC problems because you
have a component isolating the two nets still, even though fab produces a
short. The obvious drawbacks being that you have to place the short
separately from the tracks because the autorouter sees it as a component and
not a track, it can only go on component layers, and it violates some
notions of readability. On the up side it is very easy to do and very quick
to implement.

Thanks for all your help in the past Jim.

Jonathan Friedman, GSR
Networked Embedded Systems Laboratory (NESL)
University of California, Los Angeles (UCLA)

-----Original Message-----
From: J Wages [mailto:jwages@xxxxxxxxx]
Sent: Thursday, August 26, 2004 12:25 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Allegro 15.1: Shorting nets


Hey folks. Hopefully a simple question. Does Allegro 15.1 now have the
ability to short two nets together without creating a DRC error? I want
to short a digital ground plane with another isolated plane, but they
both have separate net names. I know I can do it by adding a feature
that will short the nets together using a non-etch layer during artwork
extraction, but that will cause an error at the fab end. Isn't there a
property I can add to a shape or via or pin?
Thanx in advance

Jim S. Wages / SR. PCB Layout Designer:
(919) 484-2963

-----Original Message-----
From: Schwartz, Jerome [mailto:jschwa01@xxxxxxxxxx]
Sent: Thursday, August 26, 2004 10:37 AM
To: 'icu-pcb-forum@xxxxxxxxxxxxx'
Subject: [PCB_FORUM] Re: strange characters in gerbers

Jan,

I tried: http://www.freedict.com/onldict/lat.html
Hillbilly does not translate.

 Regards,
      Jerry Schwartz, CID+
      IPC Certified Designer
     "May The Schwartz Be With You."

Designer 3
Harris Corporation GCSD              Voice (321)-727-5474
P.O. Box 37, MS 1/9843               Fax   (321)-727-6007
Melbourne, FL 32902-0037             Pager (321)-690-9797
mailto:Jerome.Schwartz@xxxxxxxxxx
http://www.harris.com




-----Original Message-----
From: Noble, Jan [mailto:jan.noble@xxxxxxxxx]
Sent: Thursday, August 26, 2004 11:26 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: strange characters in gerbers


Sam,
Your English is fine.  Welcome to the group.  HillBilly is my second
language.
:-))) Does anyone have a Latin translation for HillBilly?

Jan Noble
Intel Corporation
DuPont Board Development
253-371-6197

Cum catapultae proscriptae erunt tum soli proscripti catapultas habebunt

-----Original Message-----
From: sjcharles@xxxxxxx [mailto:sjcharles@xxxxxxx]
Sent: Thursday, August 26, 2004 8:22 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] strange characters in gerbers

Group,

I'm using the 15.2 cadence, and I'm generating gerbers. I'm seeing extra
characters in gerbers, but are not visible when I dislay the fab
drawing. I've
enable all layers and don't see these characters. Any ideas?

Please excuse my unsophisticated english.
Sam

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