[ibis-quality] Minutes from the 3 Apr 2007 ibis-quality meeting

  • From: "Mike LaBonte \(milabont\)" <milabont@xxxxxxxxx>
  • To: <ibis-quality@xxxxxxxxxxxxx>
  • Date: Sat, 7 Apr 2007 00:14:20 -0400

Minutes from the 3 Apr 2007 ibis-quality meeting are attached.
 
Mike
Minutes, IBIS Quality Committee

03 Apr 2007

11-12 AM EST (8-9 AM PST)

ROLL CALL
  Adam Tambone
  Barry Katz
  Benny Lazer
  Benjamin P Silva
* Bob Ross, Teraspeed Consulting Group
  Brian Arsenault
* David Banas, Xilinx
* Eckhard Lenski
  Eric Brock
  Gregory R Edlund
  Hazem Hegazy
  John Figueroa
  John Angulo
  Katja Koller
  Kevin Fisher
* Kim Helliwell, LSI Logic
  Lance Wang
  Lynne Green
* Mike LaBonte, Cisco
* Moshiul Haque, Micron Technology
  Peter LaFlamme
  Radovan Vuletic, Qimonda
  Robert Haller
* Roy Leventhal, Leventhal Design & Communications
  Sherif Hammad
  Todd Westerhoff
  Tom Dagostino
  Kazuyoshi Shoji
  Sadahiro Nonoyama

Everyone in attendance marked by  *

NOTE: "AR" = Action Required.

-----------------------MINUTES ---------------------------
Mike LaBonte conducted the meeting.

AR Review:

- Bob will get back to Radek on Golden Parser issues
  Done. No response yet.

- Roy will send email to the list giving FSV doc location
  Done

- Roy will contact Michael Mirmak regarding a presentation on FSV methods
  Done. No response yet.

- Mike update 3.1.2 in IQ spec to use L<100nH, C<100pF, R<10ohm
  Done

New items:

David made a proposal related to typ/min/max values:
- Xilinx would like IBIS to match SPICE.
- Customers want IBIS to match minimum datasheet guarantees.
- Xilinx proposal:
  - min IBIS column matches datasheet.
  - typ and max columns match SPICE.
- Roy:
  - The datasheet is guaranteed.
  - IBIS is the real model, but not guaranteed.
  - Suppliers need to check the two against each other.
- David:
  - Designers shouldn't design up to the limits anyway.
  - The SPICE model covers a 3-sigma range of actual production samples.
  - DDR2 is an example where timing closure at worst-case is difficult.
  - Weak I/V curves are stronger than what the datasheet implies.
  - Vohmin would occur only at max temp.
- Roy:
  - There is some risk associated with the limits.
  - The process spread should be declared by IC makers.
    - This could cause debate over pricing.
- Bob:
  - It will be difficult to get companies to do this consistently.
- Roy:
  - Industry wakes up when someone does a better job and takes business away
- Mike:
  - The min and max [Voltage Range] values "throw away margin"
  - Voltage tolerance chosen by IC vendors much wider than real power supplies.
  - Is it possible to simulate voltages other than what IBIS waveforms use?
  - SPICE can simulate at any supply voltage
- Bob:
  - Interpolation of waveforms is not recommended
  - Need to scale not just voltage, but time too.
- Roy:
  - IC vendors need to exchange more data with customers
- David:
  - It would be good if IBIS had a way to represent more than 3 corners
- Mike:
  - Years ago Al Davis proposed a format for an arbitrary number of corners
  - A keyword at the beginning defines the names of the corners in order
  - The first column is always "typical"
  - All data items in the file follow the same column order
- Bob:
  - Sometimes the fast/weak combo is the worst case

Continued review of IQ specification:

- 3.1.2. {LEVEL 2}  [Package] Parasitics must be reasonable
  - We reviewed new changes by Mike
  - Mike asked whether we should propose a Golden Parser change to:
    - Add a CAUTION using the IQ limits, or
    - Change the existing WARNING limits to match IQ limits
  - Bob: We don't want to change existing warning

- 3.1.4. {LEVEL 3}  [Package] parasitics are validated against data sheet
  - Bob:
    - The reference may not be a datasheet
  - Mike:
    - The [Package] min/max should represent the range of pin RLC values seen
  - Kim:
    - It would be best to extract RLC and get the average
  - Mike: are power and ground pins included?
    - David: Not at Xilinx; power/ground parasitics are much larger
    - Mike: The IQ spec should specify which pins are considered.
  - Mike:
    - Change the title "validated against source model"
    - Change to level 2
    - Recommend that [Package] min/max represent the range of signal pin RLC
  - Bob: how to calc typ?

Next meeting:

10 Apr 2007
11-12 AM EST (8-9 AM PST)
Phone: 1.877.384.0543 or 1.800.743.7560
Passcode: 90437837

Meeting ended at 12:04 PM Eastern Time.

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