[ibis-macro] What simulators support both VHDL-AMS and Verilog-AMS

  • From: Walter Katz <wkatz@xxxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Wed, 15 Jan 2014 11:47:20 -0500 (EST)



Our multilingual extensions now include SPICE (Berkley Spice), IBIS-ISS
(HSPICE subset), VHDL-AMS and Verilog-AMS. In general, Users will need to
simulate channels with models from multiple vendors (also including the
legacy IBIS Model "B" element). This will include simulations that have
combinations of IBIS-ISS, VHDL-AMS and Verilog-AMS (I ignore SPICE since
it is essentially a subset of IBIS-ISS). 


My research on the WEB indicates:

Synopsis supports IBIS-ISS,  Verilog

Mentor supports IBIS-ISS, Verilog, VHDL

Cadence supports IBIS-ISS, Verilog, VHDL

Agilent supports IBIS-ISS, Verilog

Ansys supports IBIS-ISS, Verilog


Is this correct?




Walter Katz

 <mailto:wkatz@xxxxxxxxxx> wkatz@xxxxxxxxxx

Phone 303.449-2308

Mobile 303.335-6156


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  • » [ibis-macro] What simulators support both VHDL-AMS and Verilog-AMS - Walter Katz