Hi John:
Thank you for calling in today. Your discussion was quite helpful.
The encryption proposal has been approved for Verilog 1364-2005 and a similar draft is pending completion for VHDL by DAC. Both are targetted for IEEE adoption.
Simply supporting or even endorsing the encryption documents in the Verilog and Accelera/VHDL groups looks like the best approach for IBIS members. If several groups support a common approach, then the EDA and semiconductor/IP vendors to should also support that approach for business reasons.
I might suggest a formal IBIS resolution showing such support.
The IBIS Committee plans to meet on Tuesday, July 25 at DAC, probably at the hotel Mentor is booking. I will follow up later, but you are welcome to attend and give a status update on the language group encryption efforts (1/2 hour or so.) You can even join for a free lunch. We can schedule a time slot that matches your schedule.
We assume that the approaches taken would easily extend to VHDL-AMS and Verilog-AMS (whether or not officially approved). We would support such extensions.
We hope to call on you for more information.
Bob
-- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@xxxxxxxxxxxxx
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