[ibis-macro] Minutes from the 26 May and 02 Jun 2009 ibis-atm meetings

  • From: "Mike LaBonte (milabont)" <milabont@xxxxxxxxx>
  • To: "IBIS-ATM" <ibis-macro@xxxxxxxxxxxxx>
  • Date: Tue, 2 Jun 2009 21:03:16 -0400

Minutes from the 26 May and 02 Jun 2009 ibis-atm meetings are attached.

Mike
IBIS Macromodel Task Group

Meeting date: 02 June 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
* Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris McGrath, Synopsys
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
* Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
  Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
* Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
  Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Walter: Continue IBIS-IS edits
  - Done and sent to the list

- Todd: Write IBIS s-param BIRD
  - Still working on it

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Continued review of IBIS-IS documents:

Walter showed the IBIS-IS document and Arpad's comments
- Walter changed all references to HSPICE-RH to HSPICE
  - We need to decide whether to eliminate all references to HSPICE
- Walter: Comments about .ALTER, .PRINT, .PROBE were removed
- Walter: Changes about {} and [] were left in
- Walter: We may want a more limited character set
  - Some SPICEs may have problems with certain characters
- Walter: We should change "avoid X" to "X is illegal"
  - Bob: We shouldn't be more restrictive than necessary
  - Walter: For example, the minus sign in node names
  - Walter marked this for later discussion
- Walter: Anything illegal in HSPICE is illegal in IBIS-IS
- "Included only" means legal but not as the first character of a name
- The "First line of a netlist" rule was deleted
  - IBIS-IS has no main level netlists
- Arpad: Will we need the I element?
  - Walter: It is not needed for interconnect
  - Bob: We included V because it is used for controlled sources
  - Walter: Actually it is used for shorting
  - Bob: And it can be used for current sources
- Walter: Hierarchical node names are not allowed
- Walter: Diodes and transistors are not supported
- Walter: X is a synonym for MEG
  - Bob: We should support that
    - Files should not be rejected for having minor discrepancies
- MIL is also a supported scaling unit (= 25.4e-6)

- Walter: We will not support .OPTION EXPMAX
  - Arpad: That might be an issue
  - Walter: We should discuss the option needs of simulators
  - Arpad: Will our subckts need to specify options?
    - Michael M: We should not allow that
  - We should discuss this once we are sure what EXPMAX is intended for
- Walter: PARHIER is not supported
  - Arpad: This might break some legitimate circuits
  - Walter: Agree, this needs discussion
- Rules regarding multiple definitions of the same parameter:
  - Walter deleted "or .OPTION statement"
  - Also deleted the sentence about simulator warnings
- Walter: The entire section about schematic netlists is deleted
  - Also deleted hierarchy parameters and the M parameter
  - Arpad: The M parameter connects M number of elements in parallel
    - It was used for transistor sizing
    - Mike L: It seems easy to pre-process this
  - Walter left the M parameter provision in
- Walter: We rarely see .PARAM in interconnect
  - Arpad: It can be useful for long expressions that are used repeatedly
- Arpad: Do we support string parameters?
  - These were introduced for elements that take string args
  - We may not need it
- Walter made changes to the parameter passing order table:
  - We will not have SWEEP parameters
  - We will not have library parameters

- Walter: We will not support user defined functions
- Some built-in functions are also deleted:
  - val
  - relational operators
- Walter: HSPICE has at least 2 conditional mechanisms:
  - The .if/.else mechanism
  - Operator conditionals
- Bob: Did we keep the conditionals?
  - Walter: No
- Arpad: We should keep the ternary operator
  - Walter: Then we need the conditionals too
  - Mike L: This can create non-linearities
    - Walter: But it is evaluated statically
- Bob: Conditionals are used only in expressions
- Arpad: Conditionals can change a value at points in time
  - Mike L: But that conflicts with the "static evaluation" rule
- Walter restored the conditional operators

- Walter deleted paragraphs about "cells"
- We will have to discuss the section on Library Integrity
  - It gives rules that are useful

We revisited parameter hierarchy:
- Walter restored deleted rules on this

Arpad asked members to take time to review the IBIS-IS document

Mike L asked if we picked up any new items for the wish list
- None identified

Next meeting: 9 June 2009 12:00pm PT

--------

IBIS Interconnect SPICE Wish List:

1) Simulator directives
IBIS Macromodel Task Group

Meeting date: 26 May 2009

Members (asterisk for those attending):
  Adge Hawes, IBM
  Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris McGrath, Synopsys
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
  Eckhard Lenski, Nokia-Siemens Networks
  Essaid Bensoudane, ST Microelectronics
  Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Agilent
  Jerry Chuang, Xilinx
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
  Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
  Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Comeau, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Pytel, Ansoft
* Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
  Todd Westerhoff, SiSoft
  Vladimir Dmitriev-Zdorov
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Zhen Mu, Cadence Design Systems

------------------------------------------------------------------------
Opens:

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Walter: Contact Synopsys about remaining documents
  - They sent more documents

- Todd: Write IBIS s-param BIRD
  - Still working on it

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

Continued review of IBIS-IS documents:

Arpad showed the new document from Walter:
- Randy: A lot of pages about .SUBCKT were added
- Arpad: There probably are few changes in the beginning part

"Input netlist and data entry"
- Randy: The reference to HSPICE RF should be cleaned up
- Mike L: We can delete most of the first page
- Bob: We will want the 1024 character limit
  - Randy: That is a file name length limit
  - Mike L: We might decide to use IBIS length limits
- Arpad deleted some text with change tracking enabled.
- Arpad: Should we specify a file extension?
  - Mike L: Maybe, if IBISCHK will parse it
  - Bob: The .INCLUDE statement does not require any extension
- There will be no .END statement
- Arpad: Do we want to limit identifier lengths?
  - Mike L: We may want to limit file and subckt names so they fit in IBIS
  - Bob: The OS should set the limit
    - IBIS should have had less limits
    - The original idea was email and printing compatibility
    - Arpad: New editing and email tools eliminate these limits
  - We will revisit this later

"Input Line Format"
- Mike L: Can we eliminate the broken references?
  - Arpad: We were going to keep the ones targeting pages we retain
- Mike L: Can we eliminate features that seem to be specific to HSPICE RF?
  - Not sure
- Arpad: Do we keep the 1024 character line limit?
  - There are sometimes problems with long lines
- Arpad: Both + and \ seem to be supported for continuation
  - Mike L: \ may allow identifier continuation
  - Randy: Or expressions
- We deleted the wildcard feature for .PRINT, etc.
- Arpad: Should we reword the conversion of {} to [] ?
  - Mike L: This looks like a pre-processor translation
  - Randy: [] are sometimes used for array names
  - Bob: We could make {} illegal
    - Arpad: We shouldn't do that
  - This was reworded, but the net effect is the same
- Mike L: There does not seem to be a definition of delimiters
  - Walter: It is in there somewhere
- We decided to keep the "time keywords" restriction

"Special Characters"
- Mike L: What is "Included only"?
  - Walter: It means anywhere but the first character of an identifier
- Minus character has different rules for HSPICE and HSPICE RF?
  - Mike L: We should use the more restrictive rule
  - Arpad: That could be a compatibility problem
  - Walter: We do not have to be compatible with the whole world
  - Randy: It may not hurt to be RF compatible
  - Bob: Some of these are pathological cases

Arpad: Should we continue reviewing item by item in committee?
- That could take months
- Walter: Could do the edits for review
- Arpad: With change tracking we could review the red edits

AR: Walter continue IBIS-IS edits

Next meeting: 2 June 2009 12:00pm PT

--------

IBIS Interconnect SPICE Wish List:

1) Simulator directives

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  • » [ibis-macro] Minutes from the 26 May and 02 Jun 2009 ibis-atm meetings - Mike LaBonte (milabont)