Minutes from the 16 November ibis-atm meeting are attached.
IBIS Macromodel Task Group
Meeting date: 16 November 2021
Members (asterisk for those attending):
Achronix Semiconductor: Hansel Dsilva
Amazon: John Yan
ANSYS: * Curtis Clark
* Wei-hsing Huang
Cadence Design Systems: * Ambrish Varma
Ken Willis
Jared James
Google: Zhiping Yang
Intel: Michael Mirmak
Kinger Cai
Alaeddin Aydiner
Keysight Technologies: * Fangyi Rao
Majid Ahadi Dolatsara
Ming Yan
Radek Biernacki
* Rui Yang
Todd Bermensolo
Luminous Computing David Banas
Marvell Steve Parker
Mathworks (SiSoft): * Walter Katz
Mike LaBonte
Micron Technology: * Randy Wolff
* Justin Butterfield
Missouri S&T Chulsoon Hwang
Siemens EDA (Mentor): * Arpad Muranyi
Teraspeed Labs: * Bob Ross
Zuken USA: * Lance Wang
The meeting was led by Arpad Muranyi. Curtis Clark took the minutes.
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Opens:
- Arpad noted that we would decide on the meeting schedule for the rest of the
year. He said we would typically cancel November 23rd, and December 21st and
28th. (Note: the group decided to suspend meetings until the January 4th
meeting. See below).
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Review of ARs:
- None.
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Call for patent disclosure:
- None.
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Review of Meeting Minutes:
Arpad asked for any comments or corrections to the minutes of the November 9th
meeting. Randy moved to approve the minutes. Walter seconded the motion.
There were no objections.
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New Discussion:
Upcoming meeting schedule:
Arpad and Ambrish suggested that, given the pace of work and current lack of
agenda items, we could suspend meetings for the rest of the year and continue in
January. Ambrish said we could cancel all meetings for the rest of the year and
reconvene early if someone had something important to discuss.
Walter moved to cancel all meetings remaining in 2021 and resume on January 4th,
2022. Ambrish seconded. There were no objections. Arpad thanked everyone for
their work in 2021.
PSIJ Modeling update:
Randy reported that he had just received a presentation from Yifan Ding at MS&T.
Randy had previously shared a transistor-level SPICE model with the MS&T team so
they could work on validating their approach to adding PSIJ information to an
IBIS model. Randy said he would not email the presentation to the group because
it was a preliminary report and there would be some more back and forth with the
MS&T team.
Randy reviewed the presentation and discussed some of his results vs. MS&T's.
Randy noted that Yifan had used a different simulator than Randy had for IBIS
buffer simulations, but the two tools' IBIS results looked similar.
Randy noted that MS&T had extracted their own A(t) and B(t) correction
coefficients from the Ku(t) and Kd(t) data, rather than employing the PSIJ
values (s/V) that Randy had derived in his study with the same SPICE model.
Randy said he would ask Yifan to go back and use his PSIJ values to study the
correlation between their PSIJ corrected IBIS model and the transistor-level
results.
Randy observed that he had originally swept Vdd over + or - 250mV from nominal.
He said he had used this large range to help get a sense of the non-linearities
involved. The MS&T presentation results were swept over a + or - 5%, which is
a subset of Randy's range but likely enough to cover the normal range of
interest. Randy said he hadn't had a chance to review the data carefully, but
he expected the MS&T PSIJ corrected IBIS results wouldn't match his SPICE
results since MS&T had arrived at a different PSIJ value than he had.
In the set of curves for which the load was connected to Vss, Randy again noted
that MS&T had used a different methodology and arrived at different values. It
appeared that while sweeping Vdd a fixed voltage threshold had been used to
determine the edge timing shifts. Arpad said he preferred Randy's approach,
which had used a variable threshold proportional to the Vdd value (e.g.,
threshold = 0.75*Vdd). Randy agreed that this was part of the reason why MS&T
arrived at such different values for PSIJ depending on the sweep step.
Arpad said that we have to be careful about how we look at the waveform data
under the different load conditions. For totem pole output stages, R_fixture
connected to ground usually reveals how the pullup transistor turns off (falling
edge) or turns on (rising edge); and R_fixture connected to power reveals how
the pulldown transistor turns on (falling edge) or turns off (rising edge).
Since circuit designers try to avoid crowbar currents in the output stage, they
usually try to turn the transistor that is driving off much sooner and faster
than turning on the transistor that will drive in the opposite direction.
Depending on which edge and loading condition is in effect at any given time,
we might see different jitter effects on the output of the buffer for this
reason alone. However, this may be different for different output
architectures, such as current mode drivers or differential outputs with a
current source above and/or below the switching transistor pairs.
Looking at Randy's transistor-level results for the load-to-Vss case, Arpad
noted that the falling edge is largely governed by the pullup turning off.
The rising edge curves show a change in edge rate as well as a shift in time.
Randy observed that the falling edge curves also show edge rate changes and
timing shifts, but the effect of the timing shifts and edge rate changes is to
cluster the curves rather than separate them.
Arpad said he expected the load-to-Vdd curves to sort of be a mirror image of
the load-to-Vss curves in terms of the way the rising and falling edge curves
were shifted, but they weren't. He said the load-to-Vdd curves might best
be plotted against Vdd relative voltage values. Arpad also suggested we might
need separate PSIJ values for rising and falling transitions.
Walter said if we confine ourselves to the + or - 5% that is about all most
standards allow, then we will probably find that things are linear enough. He
agreed with Arpad that we might find that we want separate PSIJ values for the
rising and falling transitions. Walter said the EDA tool might be able to take
the values and introduce the edge shifts in the stimulus waveform somehow, or
perhaps it could be handled inside the IBIS model itself. There are several
ways PSIJ could be represented. Randy said MS&T's approach was looking at the
average Vdd variation over each UI and applying the jitter based on that.
Walter and Arpad said it can be hard to separate rise time differences from
delays in the curves as presented. Randy said he had mentioned in his
presentation that one method might be to measure the timing differences between
IBIS models, which don't include PSIJ, and transistor-level SPICE models that
do. This would allow us to isolate the edge timing difference caused by PSIJ.
Arpad and Walter suggested that the curves for various values of Vdd should be
scaled (normalized) in the amplitude of their swings and shifted to a common
reference. By scaling according to the nominal curve and shifting to a common
reference the curves would overlay in a way that allows us to isolate the timing
and edge rate differences. Walter asked if Randy could provide his curve data
in a csv format so Walter could experiment with massaging it. Randy said he
would put the data in a format that he could share with Walter.
- Walter: Motion to adjourn.
- Ambrish: Second.
- Arpad: Thank you all for joining.
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Next meeting: 23 November 2021 12:00pm PT (cancelled)
- Meetings suspended until we next meet on January 04, 2022 (see above).
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IBIS Interconnect SPICE Wish List:
1) Simulator directives
