[ibis-macro] Minutes from the 14 Jan 2014 ibis-atm meeting

  • From: Mike LaBonte <mike@xxxxxxxxxxx>
  • To: ibis-macro@xxxxxxxxxxxxx
  • Date: Tue, 21 Jan 2014 14:37:03 -0500

Minutes from the 14 Jan 2014 ibis-atm meeting are attached.

IBIS Macromodel Task Group

Meeting date: 14 January 2013

Members (asterisk for those attending):
Agilent:                      Fangyi Rao
                            * Radek Biernacki
Altera:                       David Banas
                              Julia Liu
                              Hazlina Ramly
ANSYS:                        Samuel Mertens
                            * Dan Dvorscak
                            * Curtis Clark
                              Steve Pytel
                              Luis Armenta
Arrow Electronics:            Ian Dodd
Cadence Design Systems:       Terry Jernberg
                            * Ambrish Varma
                              Feras Al-Hawari
                            * Brad Brim
                              Kumar Keshavan
                              Ken Willis
Cavium Networks:              Johann Nittmann
Celsionix:                    Kellee Crisafulli
Cisco Systems:                Ashwin Vasudevan
                              Syed Huq
Ericsson:                     Anders Ekholm
IBM:                          Greg Edlund
Intel:                        Michael Mirmak
Maxim Integrated Products:    Mahbubul Bari
                              Hassan Rafat
                              Ron Olisar
Mentor Graphics:            * John Angulo
                              Zhen Mu
                            * Arpad Muranyi
                              Vladimir Dmitriev-Zdorov
Micron Technology:          * Randy Wolff
                              Justin Butterfield
NetLogic Microsystems:        Ryan Couts
Nokia-Siemens Networks:       Eckhard Lenski
QLogic Corp.                  James Zhou
                              Andy Joy
SiSoft:                     * Walter Katz
                              Todd Westerhoff
                              Doug Burns
                            * Mike LaBonte
Snowbush IP:                  Marcus Van Ierssel
ST Micro:                     Syed Sadeghi
Teraspeed Consulting Group:   Scott McMorrow
                            * Bob Ross
TI:                           Casey Morrison
                              Alfred Chong
Vitesse Semiconductor:        Eric Sweetman
Xilinx:                       Mustansir Fanaswalla
                              Ray Anderson

The meeting was led by Arpad Muranyi


- None

Call for patent disclosure:

- None

Review of ARs:

- Walter send presentation to Mike for posting
  - Done

New Discussion:

Package Model proposal from Walter Katz:
- Arpad: Is there any more to discuss?
- Walter: I will have a presentation at the upcoming summit.
- Bob: The title has "IBIS-ISS" but it covers both that and Touchstone.
  - Both "buf" and "mod" are used, and it is not always clear if they are the 
- Walter: Pin, pad, and buf are separate items.
  - Where "model" is used it is a model definition name.
  - "IO" is a model type.
  - Bob had objected to "+" and "-", preferring "p" and "n".
- Bob: On slide 17 "V" should be separated from "IO" with underscore.

BIRDS 163, 164, 165
- Arpad: BIRDs 163 and 164 could be merged, are co-dependent.
  - BIRD 165 is independent of the others.

- Arpad showed BIRD 164.
- Arpad: This makes [External Circuit] usable for package models.
  - There was a suggestion that "Package_Model" could have a value.
- Bob: It could be [External Package Model].

- Arpad showed BIRD 163.
- Arpad: Black text is unchanged, red text is changed.
  - This adds the ability to connect to [Model] terminals directly.
  - We found a way to cascade model with external circuits.
  - Each model is instantiated by [Pin], but the circuit models are aligned to 
- Bob: [Model] includes [External Model]?
- Arpad: Yes.
  - The first example drawing has changed significantly.
  - One circuit describes on-die interconnect, another the package.
  - The numbers after the colons indicate the associated pin numbers.
- Radek: Walter's proposal has a buffer concept that is similar.
- Walter: Agree, this is the same functionality with a different syntax.
  - Why can't a die node be anything other than die pad?.
  - Are die nodes die pads?
- Arpad: Yes.
  - There are buffer nodes that exist only for internal connections.
  - [Node Declarations] would only be needed for internal die nodes.
  - The main change for [Circuit Call] is new reserved node names for buffer 

- Arpad noted that the BIRD has a "questions" section.

- Arpad: The previous example Figure 29 showed features not supported by IBIS.
  - This is corrected in this BIRD.
  - Power and ground connection would work in concert with new supply bus 
- John: This shows everything it can do in one figure.
- Ambrish: BIRDs 145 and 125 would be rejected?
- Arpad: Yes, once this is approved.
- Bob: [External Model] could be called too?
- Arpad: No they are called only from [Model].
  - [Circuit Call] is only needed once to instantiate the circuit.
- Walter: What do power ports connect to where the power comes from multiple 
- Arpad: The spec is vague on that.
  - If [Pin Mapping] is used it is more clear.
  - There has to be one buffer per signal pin.
  - There could be joins and splits but it has to end at one buffer instance.
- John: We have examples of this, although no picture.
- Walter: Where does the model in D come from?
- Arpad: I haven't worked out how [External Model] would work with this.
- John: IC vendors have not often used circuit calls to instantiate buffers.
- Mike: Pin names might allow colons, the instantiation syntax might be 
- Walter: Aren't the "pos" and "Neg" reserved ports redundant?
- Arpad: Those are for series switch models, they are different ports.
- Walter: In the figure pads 3a and 3b go to one pin?
- Arpad: Yes.
- Walter: Where does the output of the driver in C go to?
- Arpad: This meets the rule that one pin goes to one model instance.
  - It was in the previous spec, I didn't delete it.
- Walter: We should have examples of this matching some of my examples.
  - For example, SDRAM, FPGA, and ASIC examples with realistic package models.
  - We should compare our proposals for functionality.

- Bob: Does this deprecate legacy buffers?
- Arpad: Nothing is deprecated.
- Walter: The package model could be other than IBIS-ISS?
- Arpad: Yes.
- Bob: I would like to see a legacy buffer added to the figure.
- Arpad: That might be confusing.

Next meeting: 21 January 2013 12:00pm PT

IBIS Interconnect SPICE Wish List:

1) Simulator directives

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