[ibis-macro] Minutes from 4/13 ibis-atm meeting

  • From: "Randy Wolff (rrwolff)" <rrwolff@xxxxxxxxxx>
  • To: <ibis-macro@xxxxxxxxxxxxx>
  • Date: Thu, 15 Apr 2010 14:59:49 -0600

Here are the minutes from the 4/13 IBIS-ATM meeting.

Randy

IBIS Macromodel Task Group

Meeting date: 13 April 2010

Members (asterisk for those attending):
  Adge Hawes, IBM
* Ambrish Varma, Cadence Design Systems
  Anders Ekholm, Ericsson
* Arpad Muranyi, Mentor Graphics Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
  Brad Brim, Sigrity
  Brad Griffin, Cadence Design Systems
  Chris Herrick, Ansoft
  Chris McGrath, Synopsys
* Danil Kirsanov, Ansoft
  David Banas, Xilinx
  Deepak Ramaswany, Ansoft
  Donald Telian, consultant
  Doug White, Cisco Systems
  Eckhard Lenski, Nokia-Siemens Networks
  Eckhard Miersch, Sigrity
  Essaid Bensoudane, ST Microelectronics
* Fangyi Rao, Agilent
  Ganesh Narayanaswamy, ST Micro
  Gang Kang, Sigrity
  Hemant Shah, Cadence Design Systems
  Ian Dodd, consultant
  Jerry Chuang, Xilinx
  Joe Abler, IBM
  John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
* Ken Willis, Sigrity
  Kumar Keshavan, Sigrity
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco Systems
* Michael Mirmak, Intel Corp.
  Mike LaBonte, Cisco Systems
  Mike Steinberger, SiSoft
  Mustansir Fanaswalla, Xilinx
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
  Pavani Jella, TI
  Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
  Ray Komow, Cadence Design Systems
  Richard Mellitz, Intel
  Richard Ward, Texas Instruments
  Samuel Mertens, Ansoft
  Sam Chitwood, Sigrity
  Sanjeev Gupta, Agilent
* Scott McMorrow, Teraspeed Consulting Group
  Shangli Wu, Cadence Design Systems
  Sid Singh, Extreme Networks
  Stephen Scearce, Cisco Systems
  Steve Kaufer, Mentor Graphics
  Steve Pytel, Ansoft
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
  Ted Mido, Synopsys
  Terry Jernberg, Cadence Design Systems
* Todd Westerhoff, SiSoft
* Vladimir Dmitriev-Zdorov, Mentor Graphics
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
* Walter Katz, SiSoft
  Wenyi Jin, LSI Logic
  Zhen Mu, Mentor Graphics

------------------------------------------------------------------------
Opens:

- Michael Mirmak: Did we decide on a uniform list of tool/IC vendors supporting 
AMI?
   Arpad: tool vendors will do their own announcements.
   Walter: Is there a place on IBIS website for those who support IBIS?
   Michael: Model library is a comprehensive list.
   Bob: Roster page also lets companies show how they support IBIS.
   Walter: Thinks this is the appropriate place for that.

--------------------------
Call for patent disclosure:

- No one declared a patent.

-------------
Review of ARs:

- Arpad: send the two BIRD documents and updated spreadsheet to Mike L. to be 
posted
 - done
 

- Arpad:  Write parameter passing syntax proposal (BIRD draft)
          for *-AMS models in IBIS that is consistent with the
          parameter passing syntax of the AMI models
          - TBD

- TBD:    Propose a parameter passing syntax for the SPICE
          - [External ...] also?
          - TBD

- Arpad:  Review the documentation (annotation) in the macro libraries.
          - Deferred until a demand arises or we have nothing else to do

-------------
New Discussion:

1. Discuss updated Task List spreadsheet
Arpad: Groups of items in the spreadsheet are parser developer questions, AMI 
  flow related, and ambiguities in the text.

Arpad: Under scale factors, what is 'clarify AMI is a control/initialization 
syntax'?
  - Bob: Just that AMI should not support scale factors.

Arpad: Under white space, is CRLF allowed in .ami files or parameter strings 
  extracted from it?
  - Bob: In .ami file, anything is allowed by the parser.
  - Michael M: The .ami section of the spec covers this maybe, but it isn't 
clear if 
    it describes what is allowed in the parameter string for the DLL extracted 
from it.
  - Arpad: Parameter strings are a separate topic.

Arpad: Will take offline questions on lines 17 to 23.

2. Discuss AMI Flow BIRD
Arpad: Ken Willis, Ambrish, and Fangyi all sent emails to the reflector related 
to the 
  Init_Returns_Filter boolean. They were in opposition to including this in the 
current 
  Flow clarification.

Arpad showed a flow without this boolean. He found issues when both Tx_GetWave 
and 
  Rx_GetWave exist.
  - Ambrish: You can use the flow in the current spec.
  - Arpad: Same issue with Tx_GetWave only.  

Ambrish: Slide 6 is a special case. We won't expect an equalization in the Init 
call and 
  GetWave at the same time.
  - Arpad: The boolean is appropriate in this case.  Either we don't support 
this case at 
    all or we support the boolean.
  - Ambrish: Might be another way of doing this that Kumar discussed. The tool 
generates 
    a unit impulse response.

Arpad: Making any changes will take another month at least to approve. We need 
to decide 
  today whether to make more changes or go with the flow decided last year.
  - Fangyi: Before we were talking about a new spec. Now we are talking about a 
cleanup only. 
    We can introduce this in a new version of the standard, but not in a 
cleanup BIRD.
  - Arpad: But is it worth our time to create two separate BIRDs on the flow?
  - Ambrish: Adding this boolean makes the flow a lot more complex.
  - Fangyi: Adding this boolean doesn't fix current models, that is why it is a 
new feature.

Arpad: Change plan on voting on the BIRD and instead vote on whether we keep 
the BIRD as 
  it is (Yes) or whether we create a separate cleanup BIRD (No).

Vote results:
Ambrish No
Arpad Yes
Bob Abstain
Danil Yes
Fangyi No
Ken No
Michael No
Randy Abstain
Todd Yes

Arpad: With a No vote, he will prepare a new flow for next week that satisfies 
the 
  existing clarification flow as well as the new flow.
  - Fangyi: All the analysis of different scenarios is still valid for the new 
flow.

3. Clock_times BIRD discussion
Arpad: Showed a difference view between the old and new clock_times description 
in 
  the specification.
  - Scott: Main difference is redefinition of period to be the instantaneous 
period.  
    One interpretation means the nominal UI of the bit stream, but physical 
device 
    doesn't care about that. This is incorrect and can give the wrong results 
when 
    we look at the sampled point and the clock from the CDR.  
  
Scott: This BIRD defines what a clock_time is and what it means. It eliminates 
  anomalies found in current models.  Clocks must be monotonic. A pair of 
values 
  in the clock time array are used to derive the instantaneous sample point, 
not 
  an average sample point. 
  - Fangyi: What if there is a missing clock tick? He remembers in current spec 
that 
    there could be a missing tick.
  - Scott:  The tick is a physical sampling point in time. 
  - Vladimir: There is confusion between two things. Number of clock ticks 
could be 
    different from number of samples. Once all GetWaves are combined, there 
should 
    be no missing times.
  - Scott: if a CDR failure occurs, goes out of lock, you get longer or shorter 
intervals. 
    This is ok.

Scott: Clock times are the transition edge of the phase lock clock. Second 
statement 
  says that sample is assumed to occur half a clock period after that. One can 
make 
  it either nominal or the instantaneous clock time. If nominal, in a CDR 
system, 
  if sending back the phase locked clock and if not a nominal period, EDA 
platform 
  computes the wrong sample point. 
  - Fangyi: Model makers are concerned about where the clock is centered, not 
where 
    it is sampled.
  - Scott: The only important thing to the EDA platform is where the sample 
point 
    is, but it isn't being returned.
  - Walter: AMI modeling system is similar to IBM's HSSCDR. It outputs the 
waveform and 
    where the location is being sampled. The clock ticks are meant to be 
related to 
    1/2 the nominal UI period. The spec says "one half clock period" but should 
be 
    one half bit time.
  - Scott: will re-write the spec to indicate that clock times are calculated 
based 
    on the internal sample point corrected by 1/2 the nominal UI.


Vladimir: How can we distinguish?  What should EDA tool do if clock times will 
  appear after one million bit simulation.
  - Arpad: The issue is if a tool can distinguish between getting no clock 
times 
    and getting clock times after a very long wait. This affects memory 
allocation.
  - Fangyi: You can prepare the eye when no clock ticks return using uniform 
clock 
    ticks. If you get real clock ticks, then use them and throw out the uniform 
clock 
    ticks. You have to assume the clock ticks relate to time zero when they do 
arrive.

AR: Arpad to create new flow diagram for the clarification BIRD.
AR: Scott to rewrite clock ticks BIRD

Next meeting: 20 Apr 2010 12:00pm PT

--------

IBIS Interconnect SPICE Wish List:

1) Simulator directives

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  • » [ibis-macro] Minutes from 4/13 ibis-atm meeting - Randy Wolff (rrwolff)