[ibis-interconn] Minutes, IBIS Interconnect Task Group Meeting for October 7, 2015

  • From: "Mirmak, Michael" <michael.mirmak@xxxxxxxxx>
  • To: "IBIS-Interconnect (ibis-interconn@xxxxxxxxxxxxx)" <ibis-interconn@xxxxxxxxxxxxx>
  • Date: Tue, 13 Oct 2015 07:50:09 +0000

======================================================================

IBIS INTERCONNECT TASK GROUP

http://www.eda.org/ibis/interconnect_wip/

Mailing list:
ibis-interconnect@xxxxxxxxxxxxx<mailto:ibis-interconnect@xxxxxxxxxxxxx>

Archives at //www.freelists.org/archive/ibis-interconn/

======================================================================



Attendees from October 7 Meeting (* means attended)

ANSYS Curtis Clark

Cadence Design Systems Bradley Brim

Cisco David
Siadat

Intel Corp. Michael Mirmak*

Keysight Technologies Radek Biernacki

Mentor Graphics Arpad Muranyi*

Micron Technology Justin Butterfield*,
Randy Wolff*

Signal Integrity Software Walter Katz*, Mike LaBonte*

Teraspeed Labs Bob Ross*

University of Aveiro in Portugal Wael Dghais



No patents were declared.



During opens, Randy Wolff noted that e-mail problems caused issues with
distribution of the minutes he took. Michael Mirmak will send the minutes to
the reflector.

Mike LaBonte moved to defer minutes consideration until next time. Randy
seconded. The motion carried without objection.



Walter Katz noted that he has a presentation in progress. Mike's drawings will
be updated later, as he has not finalized his revisions to them.



Bob Ross noted that he is withdrawing his EPEPS presentation. However, he will
present some drawings during this meeting.



Walter reviewed his slides, providing several examples of pin, and terminal
usage; not all the examples have pads. His update to the BIRD uses draft 23 as
a baseline and incorporates drawings.



He noted that the association pin_rail signal_name shows that all signals are
shorted on the pin side. The second and third column of Begin/End Interconnect
Model section use reserved names. Pins listed under [Pin] using the same
signal name means they are connected.



Michael asked what to do about different model_names with a shared signal_name.
Walter replied that a signal_name is a data book name.



Randy asked what is applied to PU_ref and PD_ref in the absence of a
connection. Walter answered that one should assume Voltage Range & GND
connections. Bob added that one could assume an external voltage; it's
sometimes hard to tell.



Walter to post his examples via Mike LaBonte. Arpad Muranyi asked whether the
rules shown are actually spelled out in the documentation. Walter confirmed
they word.



Bob presented his updated drawings, which Mike will post to the website..



Michael will start editing Draft 23 (now with Terminal improvements) for
clarification and readability; this draft 24 will be the discussion topic next
time. Bob noted that the document might need additional text to clarify
subtleties. Walter added that verification would be needed, using at least 9
cases for testing.



Bob noted that the document needs to settle on notation; for example, a "Bus
Model" keyword may be contradictory. He added that we have deferred issues to
consider yet, such as filename conventions, separate interconnect files vs.
embedded (in-line) data, etc.











Other related posts:

  • » [ibis-interconn] Minutes, IBIS Interconnect Task Group Meeting for October 7, 2015 - Mirmak, Michael