2009/4/19 Marcus Overhagen <marcusoverhagen@xxxxxxxx>: > dlmcpaul at BerliOS schrieb: > >> Author: dlmcpaul >> Date: 2009-04-19 07:02:42 +0200 (Sun, 19 Apr 2009) >> New Revision: 30259 >> ViewCVS: http://svn.berlios.de/viewcvs/haiku?rev=30259&view=rev >> >> Modified: >> haiku/trunk/src/bin/sysinfo.c >> Log: >> made some changes according to the intel programmers guide. Our get_cpuid >> needs changes > > I made some suggestions on the open-beos-kernel-devel list, but it appears > that the mail I sent in March never reached the list. > > See below, please discuss on haiku-development. > > Christian Packmann schrieb: > >> The current implementation in Haiku only allows CPUID input in register >> EAX; some recent CPUID functions on Intel also require an input in ECX to >> indicate the requested level of the topology. So there needs to be a new >> CPUID wrapper which also allows for inputs to ECX. I already mentioned > > We could add an > get_cpuid_etc(cpuid_info *, const cpuid_params *, uint32 flags) > > struct cpuid_params { > uint32 cpuNum; > uint32 eax; > uint32 ebx; > uint32 edx; > uint32 ecx; > }; > > > Or we use a macro as in get_sem_info and break source compatibility. > > > status_t get_cpuid(cpuid_info *info, uint32 eaxRegister, uint32 cpuNum); > status_t _get_cpuid_etc(cpuid_info *, const cpuid_params *); > > #define get_cpuid(info, param) _get_cpuid_etc(info, param) > > which would overlay get_cpuid calls while still retaining binary > compatibility. > > > optionally, extend the cpuid_info struct > > typedef union { > [...] > struct { > uint32 eax; > uint32 ebx; > uint32 edx; > uint32 ecx; > } inputs; > } cpuid_info; > > instead of adding the params struct. Yes, something like this could work. I started to change get_cpuid to add an additional parameter for ecx but stopped when I realised I might break compatability. We should be able to just add a new version of get_cpuid as you did above and that should not break anything right? What we get out of having the new format is that sysinfo can properly query the cache information. Currently we can only get the first (ecx defaults to 0) cache level. The original function only worked for AMD, Intel chips returned 0. -- Cheers David