On 10/15/2011 06:30 PM, Stefano Ceccherini wrote:
They are shareable if set to level triggered. If set to edge, they are
not.
(from the HPET specification)
"If the interrupts are mapped to the I/O APIC and set for
level-triggered mode, they can be shared with PCI
interrupts."
"If a timer is set for edge-triggered mode, the timers should not be
shared with any PCI interrupts."
That sounds plain wrong. Edge triggered is what should be used for
shareable interrupts (or for all interrupts, anyway, since it's not
possible to miss one).
