[haiku-commits] r42863 - in haiku/trunk: headers/private/graphics/intel_extreme src/add-ons/accelerants/intel_extreme src/add-ons/kernel/busses/agp_gart src/add-ons/kernel/drivers/graphics/intel_extreme
- From: mmlr@xxxxxxxx
- To: haiku-commits@xxxxxxxxxxxxx
- Date: Sun, 16 Oct 2011 17:15:04 +0200 (CEST)
Author: mmlr
Date: 2011-10-16 17:15:03 +0200 (Sun, 16 Oct 2011)
New Revision: 42863
Changeset: https://dev.haiku-os.org/changeset/42863
Modified:
haiku/trunk/headers/private/graphics/intel_extreme/intel_extreme.h
haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.h
haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant_protos.h
haiku/trunk/src/add-ons/accelerants/intel_extreme/commands.h
haiku/trunk/src/add-ons/accelerants/intel_extreme/cursor.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/dpms.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/engine.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/hooks.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/memory.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/mode.cpp
haiku/trunk/src/add-ons/accelerants/intel_extreme/overlay.cpp
haiku/trunk/src/add-ons/kernel/busses/agp_gart/intel_gart.cpp
haiku/trunk/src/add-ons/kernel/drivers/graphics/intel_extreme/device.cpp
haiku/trunk/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp
haiku/trunk/src/add-ons/kernel/drivers/graphics/intel_extreme/driver.h
haiku/trunk/src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
Log:
Style cleanups only, no functional change.
* Make the pointer style consistent accross all components, which should make it
easier when working all over the place.
* 80 char limits.
Modified: haiku/trunk/headers/private/graphics/intel_extreme/intel_extreme.h
===================================================================
--- haiku/trunk/headers/private/graphics/intel_extreme/intel_extreme.h
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/headers/private/graphics/intel_extreme/intel_extreme.h
2011-10-16 15:15:03 UTC (rev 42863)
@@ -227,7 +227,8 @@
// Register definitions, taken from X driver
// PCI bridge memory management
-#define INTEL_GRAPHICS_MEMORY_CONTROL 0x52 // GGC - (G)MCH Graphics
Control Register
+#define INTEL_GRAPHICS_MEMORY_CONTROL 0x52
+ // GGC - (G)MCH Graphics Control Register
#define MEMORY_CONTROL_ENABLED 0x0004
#define MEMORY_MASK 0x0001
#define STOLEN_MEMORY_MASK 0x00f0
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.cpp
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.cpp
2011-10-16 15:15:03 UTC (rev 42863)
@@ -23,14 +23,14 @@
#define TRACE_ACCELERANT
#ifdef TRACE_ACCELERANT
-extern "C" void _sPrintf(const char *format, ...);
+extern "C" void _sPrintf(const char* format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
#endif
-struct accelerant_info *gInfo;
+struct accelerant_info* gInfo;
class AreaCloner {
@@ -38,7 +38,7 @@
AreaCloner();
~AreaCloner();
- area_id Clone(const char *name, void
**_address,
+ area_id Clone(const char* name, void**
_address,
uint32 spec,
uint32 protection,
area_id
sourceArea);
status_t InitCheck()
@@ -65,7 +65,7 @@
area_id
-AreaCloner::Clone(const char *name, void **_address, uint32 spec,
+AreaCloner::Clone(const char* name, void** _address, uint32 spec,
uint32 protection, area_id sourceArea)
{
fArea = clone_area(name, _address, spec, protection, sourceArea);
@@ -91,7 +91,7 @@
{
// initialize global accelerant info structure
- gInfo = (accelerant_info *)malloc(sizeof(accelerant_info));
+ gInfo = (accelerant_info*)malloc(sizeof(accelerant_info));
if (gInfo == NULL)
return B_NO_MEMORY;
@@ -113,7 +113,7 @@
AreaCloner sharedCloner;
gInfo->shared_info_area = sharedCloner.Clone("intel extreme shared
info",
- (void **)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA |
B_WRITE_AREA,
+ (void**)&gInfo->shared_info, B_ANY_ADDRESS, B_READ_AREA |
B_WRITE_AREA,
data.shared_info_area);
status_t status = sharedCloner.InitCheck();
if (status < B_OK) {
@@ -123,7 +123,7 @@
AreaCloner regsCloner;
gInfo->regs_area = regsCloner.Clone("intel extreme regs",
- (void **)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA |
B_WRITE_AREA,
+ (void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA |
B_WRITE_AREA,
gInfo->shared_info->registers_area);
status = regsCloner.InitCheck();
if (status < B_OK) {
@@ -137,7 +137,7 @@
// The overlay registers, hardware status, and cursor memory share
// a single area with the shared_info
- gInfo->overlay_registers = (struct overlay_registers *)
+ gInfo->overlay_registers = (struct overlay_registers*)
(gInfo->shared_info->graphics_memory
+ gInfo->shared_info->overlay_offset);
@@ -242,7 +242,7 @@
void
-intel_get_accelerant_clone_info(void *info)
+intel_get_accelerant_clone_info(void* info)
{
TRACE(("intel_get_accelerant_clone_info()\n"));
ioctl(gInfo->device, INTEL_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH);
@@ -250,7 +250,7 @@
status_t
-intel_clone_accelerant(void *info)
+intel_clone_accelerant(void* info)
{
TRACE(("intel_clone_accelerant()\n"));
@@ -258,9 +258,9 @@
char path[B_PATH_NAME_LENGTH];
strcpy(path, "/dev/");
#ifdef __HAIKU__
- strlcat(path, (const char *)info, sizeof(path));
+ strlcat(path, (const char*)info, sizeof(path));
#else
- strcat(path, (const char *)info);
+ strcat(path, (const char*)info);
#endif
int fd = open(path, B_READ_WRITE);
@@ -273,7 +273,7 @@
// get read-only clone of supported display modes
status = gInfo->mode_list_area = clone_area(
- "intel extreme cloned modes", (void **)&gInfo->mode_list,
+ "intel extreme cloned modes", (void**)&gInfo->mode_list,
B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area);
if (status < B_OK)
goto err2;
@@ -312,7 +312,7 @@
status_t
-intel_get_accelerant_device_info(accelerant_device_info *info)
+intel_get_accelerant_device_info(accelerant_device_info* info)
{
TRACE(("intel_get_accelerant_device_info()\n"));
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.h
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.h
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant.h
2011-10-16 15:15:03 UTC (rev 42863)
@@ -31,17 +31,17 @@
};
struct accelerant_info {
- uint8 *registers;
+ uint8* registers;
area_id regs_area;
- intel_shared_info *shared_info;
+ intel_shared_info* shared_info;
area_id shared_info_area;
- display_mode *mode_list; // cloned list of standard
display modes
+ display_mode* mode_list; // cloned list of standard
display modes
area_id mode_list_area;
- struct overlay_registers *overlay_registers;
- overlay *current_overlay;
+ struct overlay_registers* overlay_registers;
+ overlay* current_overlay;
overlay_view last_overlay_view;
overlay_frame last_overlay_frame;
uint32 last_horizontal_overlay_scale;
@@ -69,14 +69,14 @@
#define HEAD_MODE_CLONE 0x03
#define HEAD_MODE_LVDS_PANEL 0x08
-extern accelerant_info *gInfo;
+extern accelerant_info* gInfo;
// register access
inline uint32
read32(uint32 encodedRegister)
{
- return *(volatile uint32 *)(gInfo->registers
+ return *(volatile uint32*)(gInfo->registers
+
gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)]
+ REGISTER_REGISTER(encodedRegister));
}
@@ -84,7 +84,7 @@
inline void
write32(uint32 encodedRegister, uint32 value)
{
- *(volatile uint32 *)(gInfo->registers
+ *(volatile uint32*)(gInfo->registers
+
gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)]
+ REGISTER_REGISTER(encodedRegister)) = value;
}
@@ -96,7 +96,7 @@
// engine.cpp
extern void uninit_ring_buffer(ring_buffer &ringBuffer);
-extern void setup_ring_buffer(ring_buffer &ringBuffer, const char *name);
+extern void setup_ring_buffer(ring_buffer &ringBuffer, const char* name);
// modes.cpp
extern void wait_for_vblank(void);
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant_protos.h
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant_protos.h
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/accelerant_protos.h
2011-10-16 15:15:03 UTC (rev 42863)
@@ -22,25 +22,27 @@
// general
status_t intel_init_accelerant(int fd);
ssize_t intel_accelerant_clone_info_size(void);
-void intel_get_accelerant_clone_info(void *data);
-status_t intel_clone_accelerant(void *data);
+void intel_get_accelerant_clone_info(void* data);
+status_t intel_clone_accelerant(void* data);
void intel_uninit_accelerant(void);
-status_t intel_get_accelerant_device_info(accelerant_device_info *info);
+status_t intel_get_accelerant_device_info(accelerant_device_info* info);
sem_id intel_accelerant_retrace_semaphore(void);
// modes & constraints
uint32 intel_accelerant_mode_count(void);
-status_t intel_get_mode_list(display_mode *dm);
-status_t intel_propose_display_mode(display_mode *target, const display_mode
*low,
- const display_mode *high);
-status_t intel_set_display_mode(display_mode *mode);
-status_t intel_get_display_mode(display_mode *currentMode);
+status_t intel_get_mode_list(display_mode* dm);
+status_t intel_propose_display_mode(display_mode* target,
+ const display_mode* low, const display_mode* high);
+status_t intel_set_display_mode(display_mode* mode);
+status_t intel_get_display_mode(display_mode* currentMode);
status_t intel_get_edid_info(void* info, size_t size, uint32* _version);
-status_t intel_get_frame_buffer_config(frame_buffer_config *config);
-status_t intel_get_pixel_clock_limits(display_mode *mode, uint32 *low, uint32
*high);
+status_t intel_get_frame_buffer_config(frame_buffer_config* config);
+status_t intel_get_pixel_clock_limits(display_mode* mode, uint32* low,
+ uint32* high);
status_t intel_move_display(uint16 hDisplayStart, uint16 vDisplayStart);
-status_t intel_get_timing_constraints(display_timing_constraints *constraints);
-void intel_set_indexed_colors(uint count, uint8 first, uint8 *colorData,
uint32 flags);
+status_t intel_get_timing_constraints(display_timing_constraints* constraints);
+void intel_set_indexed_colors(uint count, uint8 first, uint8* colorData,
+ uint32 flags);
// DPMS
uint32 intel_dpms_capabilities(void);
@@ -48,42 +50,47 @@
status_t intel_set_dpms_mode(uint32 flags);
// cursor
-status_t intel_set_cursor_shape(uint16 width, uint16 height, uint16 hotX,
uint16 hotY,
- uint8 *andMask, uint8 *xorMask);
+status_t intel_set_cursor_shape(uint16 width, uint16 height, uint16 hotX,
+ uint16 hotY, uint8* andMask, uint8* xorMask);
void intel_move_cursor(uint16 x, uint16 y);
void intel_show_cursor(bool isVisible);
// accelerant engine
uint32 intel_accelerant_engine_count(void);
status_t intel_acquire_engine(uint32 capabilities, uint32 maxWait,
- sync_token *syncToken, engine_token **_engineToken);
-status_t intel_release_engine(engine_token *engineToken, sync_token
*syncToken);
+ sync_token* syncToken, engine_token** _engineToken);
+status_t intel_release_engine(engine_token* engineToken, sync_token*
syncToken);
void intel_wait_engine_idle(void);
-status_t intel_get_sync_token(engine_token *engineToken, sync_token
*syncToken);
-status_t intel_sync_to_token(sync_token *syncToken);
+status_t intel_get_sync_token(engine_token* engineToken, sync_token*
syncToken);
+status_t intel_sync_to_token(sync_token* syncToken);
// 2D acceleration
-void intel_screen_to_screen_blit(engine_token *engineToken, blit_params *list,
uint32 count);
-void intel_fill_rectangle(engine_token *engineToken, uint32 color,
fill_rect_params *list,
- uint32 count);
-void intel_invert_rectangle(engine_token *engineToken, fill_rect_params *list,
uint32 count);
-void intel_fill_span(engine_token *engineToken, uint32 color, uint16 *list,
uint32 count);
+void intel_screen_to_screen_blit(engine_token* engineToken,
+ blit_params* list, uint32 count);
+void intel_fill_rectangle(engine_token* engineToken, uint32 color,
+ fill_rect_params* list, uint32 count);
+void intel_invert_rectangle(engine_token* engineToken, fill_rect_params* list,
+ uint32 count);
+void intel_fill_span(engine_token* engineToken, uint32 color, uint16* list,
+ uint32 count);
// overlay
-uint32 intel_overlay_count(const display_mode *mode);
-const uint32 *intel_overlay_supported_spaces(const display_mode *mode);
+uint32 intel_overlay_count(const display_mode* mode);
+const uint32* intel_overlay_supported_spaces(const display_mode* mode);
uint32 intel_overlay_supported_features(uint32 colorSpace);
-const overlay_buffer *intel_allocate_overlay_buffer(color_space space, uint16
width,
- uint16 height);
-status_t intel_release_overlay_buffer(const overlay_buffer *buffer);
-status_t intel_get_overlay_constraints(const display_mode *mode, const
overlay_buffer *buffer,
- overlay_constraints *constraints);
+const overlay_buffer* intel_allocate_overlay_buffer(color_space space,
+ uint16 width, uint16 height);
+status_t intel_release_overlay_buffer(const overlay_buffer* buffer);
+status_t intel_get_overlay_constraints(const display_mode* mode,
+ const overlay_buffer* buffer, overlay_constraints* constraints);
overlay_token intel_allocate_overlay(void);
status_t intel_release_overlay(overlay_token overlayToken);
-status_t intel_configure_overlay(overlay_token overlayToken, const
overlay_buffer *buffer,
- const overlay_window *window, const overlay_view *view);
-status_t i965_configure_overlay(overlay_token overlayToken, const
overlay_buffer *buffer,
- const overlay_window *window, const overlay_view *view);
+status_t intel_configure_overlay(overlay_token overlayToken,
+ const overlay_buffer* buffer, const overlay_window* window,
+ const overlay_view* view);
+status_t i965_configure_overlay(overlay_token overlayToken,
+ const overlay_buffer* buffer, const overlay_window* window,
+ const overlay_view* view);
#ifdef __cplusplus
}
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/commands.h
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/commands.h
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/commands.h
2011-10-16 15:15:03 UTC (rev 42863)
@@ -15,7 +15,7 @@
struct command {
uint32 opcode;
- uint32 *Data() { return &opcode; }
+ uint32* Data() { return &opcode; }
};
class QueueCommands {
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/cursor.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/cursor.cpp
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/cursor.cpp
2011-10-16 15:15:03 UTC (rev 42863)
@@ -15,7 +15,7 @@
status_t
intel_set_cursor_shape(uint16 width, uint16 height, uint16 hotX, uint16 hotY,
- uint8 *andMask, uint8 *xorMask)
+ uint8* andMask, uint8* xorMask)
{
if (width > 64 || height > 64)
return B_BAD_VALUE;
@@ -23,7 +23,8 @@
write32(INTEL_CURSOR_CONTROL, 0);
// disable cursor
- // In two-color mode, the data is ordered as follows (always 64 bit per
line):
+ // In two-color mode, the data is ordered as follows (always 64 bit per
+ // line):
// plane 1: line 0 (AND mask)
// plane 0: line 0 (XOR mask)
// plane 1: line 1 (AND mask)
@@ -33,7 +34,7 @@
// transparent, for 0x3 it inverts the background, so only the first
// two palette entries will be used (since we're using the 2 color
mode).
- uint8 *data = gInfo->shared_info->cursor_memory;
+ uint8* data = gInfo->shared_info->cursor_memory;
uint8 byteWidth = (width + 7) / 8;
for (int32 y = 0; y < height; y++) {
@@ -49,10 +50,12 @@
gInfo->shared_info->cursor_format = CURSOR_FORMAT_2_COLORS;
- write32(INTEL_CURSOR_CONTROL, CURSOR_ENABLED |
gInfo->shared_info->cursor_format);
+ write32(INTEL_CURSOR_CONTROL,
+ CURSOR_ENABLED | gInfo->shared_info->cursor_format);
write32(INTEL_CURSOR_SIZE, height << 12 | width);
- write32(INTEL_CURSOR_BASE,
(uint32)gInfo->shared_info->physical_graphics_memory
+ write32(INTEL_CURSOR_BASE,
+ (uint32)gInfo->shared_info->physical_graphics_memory
+ gInfo->shared_info->cursor_buffer_offset);
// changing the hot point changes the cursor position, too
@@ -104,7 +107,8 @@
write32(INTEL_CURSOR_CONTROL, (isVisible ? CURSOR_ENABLED : 0)
| gInfo->shared_info->cursor_format);
- write32(INTEL_CURSOR_BASE,
(uint32)gInfo->shared_info->physical_graphics_memory
+ write32(INTEL_CURSOR_BASE,
+ (uint32)gInfo->shared_info->physical_graphics_memory
+ gInfo->shared_info->cursor_buffer_offset);
gInfo->shared_info->cursor_visible = isVisible;
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/dpms.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/dpms.cpp 2011-10-16
14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/dpms.cpp 2011-10-16
15:15:03 UTC (rev 42863)
@@ -13,7 +13,7 @@
//#define TRACE_DPMS
#ifdef TRACE_DPMS
-extern "C" void _sPrintf(const char *format, ...);
+extern "C" void _sPrintf(const char* format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
@@ -27,22 +27,33 @@
uint32 planeBControl = read32(INTEL_DISPLAY_B_CONTROL);
if (enable) {
- // when enabling the display, the register values are updated
automatically
- if (gInfo->head_mode & HEAD_MODE_A_ANALOG)
- write32(INTEL_DISPLAY_A_CONTROL, planeAControl |
DISPLAY_CONTROL_ENABLED);
- if (gInfo->head_mode & HEAD_MODE_B_DIGITAL)
- write32(INTEL_DISPLAY_B_CONTROL, planeBControl |
DISPLAY_CONTROL_ENABLED);
+ // when enabling the display, the register values are updated
+ // automatically
+ if (gInfo->head_mode & HEAD_MODE_A_ANALOG) {
+ write32(INTEL_DISPLAY_A_CONTROL,
+ planeAControl | DISPLAY_CONTROL_ENABLED);
+ }
+ if (gInfo->head_mode & HEAD_MODE_B_DIGITAL) {
+ write32(INTEL_DISPLAY_B_CONTROL,
+ planeBControl | DISPLAY_CONTROL_ENABLED);
+ }
+
read32(INTEL_DISPLAY_A_BASE);
// flush the eventually cached PCI bus writes
} else {
// when disabling it, we have to trigger the update using a
write to
// the display base address
- if (gInfo->head_mode & HEAD_MODE_A_ANALOG)
- write32(INTEL_DISPLAY_A_CONTROL, planeAControl &
~DISPLAY_CONTROL_ENABLED);
- if (gInfo->head_mode & HEAD_MODE_B_DIGITAL)
- write32(INTEL_DISPLAY_B_CONTROL, planeBControl &
~DISPLAY_CONTROL_ENABLED);
+ if (gInfo->head_mode & HEAD_MODE_A_ANALOG) {
+ write32(INTEL_DISPLAY_A_CONTROL,
+ planeAControl & ~DISPLAY_CONTROL_ENABLED);
+ }
+ if (gInfo->head_mode & HEAD_MODE_B_DIGITAL) {
+ write32(INTEL_DISPLAY_B_CONTROL,
+ planeBControl & ~DISPLAY_CONTROL_ENABLED);
+ }
+
set_frame_buffer_base();
}
}
@@ -55,15 +66,25 @@
uint32 pipeBControl = read32(INTEL_DISPLAY_B_PIPE_CONTROL);
if (enable) {
- if (gInfo->head_mode & HEAD_MODE_A_ANALOG)
- write32(INTEL_DISPLAY_A_PIPE_CONTROL, pipeAControl |
DISPLAY_PIPE_ENABLED);
- if (gInfo->head_mode & HEAD_MODE_B_DIGITAL)
- write32(INTEL_DISPLAY_B_PIPE_CONTROL, pipeBControl |
DISPLAY_PIPE_ENABLED);
+ if (gInfo->head_mode & HEAD_MODE_A_ANALOG) {
+ write32(INTEL_DISPLAY_A_PIPE_CONTROL,
+ pipeAControl | DISPLAY_PIPE_ENABLED);
+ }
+
+ if (gInfo->head_mode & HEAD_MODE_B_DIGITAL) {
+ write32(INTEL_DISPLAY_B_PIPE_CONTROL,
+ pipeBControl | DISPLAY_PIPE_ENABLED);
+ }
} else {
- if (gInfo->head_mode & HEAD_MODE_A_ANALOG)
- write32(INTEL_DISPLAY_A_PIPE_CONTROL, pipeAControl &
~DISPLAY_PIPE_ENABLED);
- if (gInfo->head_mode & HEAD_MODE_B_DIGITAL)
- write32(INTEL_DISPLAY_B_PIPE_CONTROL, pipeBControl &
~DISPLAY_PIPE_ENABLED);
+ if (gInfo->head_mode & HEAD_MODE_A_ANALOG) {
+ write32(INTEL_DISPLAY_A_PIPE_CONTROL,
+ pipeAControl & ~DISPLAY_PIPE_ENABLED);
+ }
+
+ if (gInfo->head_mode & HEAD_MODE_B_DIGITAL) {
+ write32(INTEL_DISPLAY_B_PIPE_CONTROL,
+ pipeBControl & ~DISPLAY_PIPE_ENABLED);
+ }
}
read32(INTEL_DISPLAY_A_BASE);
@@ -167,7 +188,8 @@
write32(INTEL_DISPLAY_A_ANALOG_PORT,
(read32(INTEL_DISPLAY_A_ANALOG_PORT)
& ~(DISPLAY_MONITOR_MODE_MASK |
DISPLAY_MONITOR_PORT_ENABLED))
- | monitorMode | (mode != B_DPMS_OFF ?
DISPLAY_MONITOR_PORT_ENABLED : 0));
+ | monitorMode
+ | (mode != B_DPMS_OFF ? DISPLAY_MONITOR_PORT_ENABLED :
0));
}
if (gInfo->head_mode & HEAD_MODE_B_DIGITAL) {
write32(INTEL_DISPLAY_B_DIGITAL_PORT,
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/engine.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/engine.cpp
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/engine.cpp
2011-10-16 15:15:03 UTC (rev 42863)
@@ -161,7 +161,7 @@
void
-setup_ring_buffer(ring_buffer &ringBuffer, const char *name)
+setup_ring_buffer(ring_buffer &ringBuffer, const char* name)
{
TRACE(("Setup ring buffer %s, offset %lx, size %lx\n", name,
ringBuffer.offset, ringBuffer.size));
@@ -197,8 +197,8 @@
status_t
-intel_acquire_engine(uint32 capabilities, uint32 maxWait, sync_token
*syncToken,
- engine_token **_engineToken)
+intel_acquire_engine(uint32 capabilities, uint32 maxWait, sync_token*
syncToken,
+ engine_token** _engineToken)
{
TRACE(("intel_acquire_engine()\n"));
*_engineToken = &sEngineToken;
@@ -214,7 +214,7 @@
status_t
-intel_release_engine(engine_token *engineToken, sync_token *syncToken)
+intel_release_engine(engine_token* engineToken, sync_token* syncToken)
{
TRACE(("intel_release_engine()\n"));
if (syncToken != NULL)
@@ -264,7 +264,7 @@
status_t
-intel_get_sync_token(engine_token *engineToken, sync_token *syncToken)
+intel_get_sync_token(engine_token* engineToken, sync_token* syncToken)
{
TRACE(("intel_get_sync_token()\n"));
return B_OK;
@@ -272,7 +272,7 @@
status_t
-intel_sync_to_token(sync_token *syncToken)
+intel_sync_to_token(sync_token* syncToken)
{
TRACE(("intel_sync_to_token()\n"));
intel_wait_engine_idle();
@@ -284,7 +284,7 @@
void
-intel_screen_to_screen_blit(engine_token *token, blit_params *params,
+intel_screen_to_screen_blit(engine_token* token, blit_params* params,
uint32 count)
{
QueueCommands queue(gInfo->shared_info->primary_ring_buffer);
@@ -304,8 +304,8 @@
void
-intel_fill_rectangle(engine_token *token, uint32 color,
- fill_rect_params *params, uint32 count)
+intel_fill_rectangle(engine_token* token, uint32 color,
+ fill_rect_params* params, uint32 count)
{
QueueCommands queue(gInfo->shared_info->primary_ring_buffer);
@@ -323,7 +323,7 @@
void
-intel_invert_rectangle(engine_token *token, fill_rect_params *params,
+intel_invert_rectangle(engine_token* token, fill_rect_params* params,
uint32 count)
{
QueueCommands queue(gInfo->shared_info->primary_ring_buffer);
@@ -342,14 +342,14 @@
void
-intel_fill_span(engine_token *token, uint32 color, uint16* _params,
+intel_fill_span(engine_token* token, uint32 color, uint16* _params,
uint32 count)
{
struct params {
uint16 top;
uint16 left;
uint16 right;
- } *params = (struct params *)_params;
+ } *params = (struct params*)_params;
QueueCommands queue(gInfo->shared_info->primary_ring_buffer);
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/hooks.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/hooks.cpp 2011-10-16
14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/hooks.cpp 2011-10-16
15:15:03 UTC (rev 42863)
@@ -11,8 +11,8 @@
#include "accelerant.h"
-extern "C" void *
-get_accelerant_hook(uint32 feature, void *data)
+extern "C" void*
+get_accelerant_hook(uint32 feature, void* data)
{
switch (feature) {
/* general */
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/memory.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/memory.cpp
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/memory.cpp
2011-10-16 15:15:03 UTC (rev 42863)
@@ -16,7 +16,7 @@
//#define TRACE_MEMORY
#ifdef TRACE_MEMORY
-extern "C" void _sPrintf(const char *format, ...);
+extern "C" void _sPrintf(const char* format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/mode.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/mode.cpp 2011-10-16
14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/mode.cpp 2011-10-16
15:15:03 UTC (rev 42863)
@@ -26,7 +26,7 @@
#define TRACE_MODE
#ifdef TRACE_MODE
-extern "C" void _sPrintf(const char *format, ...);
+extern "C" void _sPrintf(const char* format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
@@ -99,13 +99,17 @@
if (data != 0)
value |= I2C_DATA_DIRECTION_MASK;
- else
- value |= I2C_DATA_DIRECTION_MASK | I2C_DATA_DIRECTION_OUT |
I2C_DATA_VALUE_MASK;
+ else {
+ value |= I2C_DATA_DIRECTION_MASK | I2C_DATA_DIRECTION_OUT
+ | I2C_DATA_VALUE_MASK;
+ }
if (clock != 0)
value |= I2C_CLOCK_DIRECTION_MASK;
- else
- value |= I2C_CLOCK_DIRECTION_MASK | I2C_CLOCK_DIRECTION_OUT |
I2C_CLOCK_VALUE_MASK;
+ else {
+ value |= I2C_CLOCK_DIRECTION_MASK | I2C_CLOCK_DIRECTION_OUT
+ | I2C_CLOCK_VALUE_MASK;
+ }
write32(ioRegister, value);
read32(ioRegister);
@@ -184,9 +188,9 @@
size_t size = (sizeof(display_mode) +
B_PAGE_SIZE - 1)
& ~(B_PAGE_SIZE - 1);
- display_mode *list;
+ display_mode* list;
area_id area = create_area("intel extreme
modes",
- (void **)&list, B_ANY_ADDRESS, size,
B_NO_LOCK,
+ (void**)&list, B_ANY_ADDRESS, size,
B_NO_LOCK,
B_READ_AREA | B_WRITE_AREA);
if (area < B_OK)
return area;
@@ -203,7 +207,7 @@
}
// Otherwise return the 'real' list of modes
- display_mode *list;
+ display_mode* list;
uint32 count = 0;
gInfo->mode_list_area = create_display_modes("intel extreme modes",
gInfo->has_edid ? &gInfo->edid_info : NULL, NULL, 0, NULL, 0,
NULL,
@@ -285,12 +289,14 @@
limits = kLimits;
}
- TRACE(("PLL limits, min: p %lu (p1 %lu, p2 %lu), n %lu, m %lu (m1 %lu,
m2 %lu)\n",
- limits.min.post, limits.min.post1, limits.min.post2,
limits.min.n,
- limits.min.m, limits.min.m1, limits.min.m2));
- TRACE(("PLL limits, max: p %lu (p1 %lu, p2 %lu), n %lu, m %lu (m1 %lu,
m2 %lu)\n",
- limits.max.post, limits.max.post1, limits.max.post2,
limits.max.n,
- limits.max.m, limits.max.m1, limits.max.m2));
+ TRACE(("PLL limits, min: p %lu (p1 %lu, p2 %lu), n %lu, m %lu "
+ "(m1 %lu, m2 %lu)\n", limits.min.post, limits.min.post1,
+ limits.min.post2, limits.min.n, limits.min.m, limits.min.m1,
+ limits.min.m2));
+ TRACE(("PLL limits, max: p %lu (p1 %lu, p2 %lu), n %lu, m %lu "
+ "(m1 %lu, m2 %lu)\n", limits.max.post, limits.max.post1,
+ limits.max.post2, limits.max.n, limits.max.m, limits.max.m1,
+ limits.max.m2));
}
@@ -316,7 +322,8 @@
bool isLVDS)
{
float requestedPixelClock = current.timing.pixel_clock / 1000.0f;
- float referenceClock = gInfo->shared_info->pll_info.reference_frequency
/ 1000.0f;
+ float referenceClock
+ = gInfo->shared_info->pll_info.reference_frequency / 1000.0f;
pll_limits limits;
get_pll_limits(limits);
@@ -344,7 +351,8 @@
pll_divisors bestDivisors;
bool is_igd = gInfo->shared_info->device_type.InGroup(INTEL_TYPE_IGD);
- for (divisors.m1 = limits.min.m1; divisors.m1 <= limits.max.m1;
divisors.m1++) {
+ for (divisors.m1 = limits.min.m1; divisors.m1 <= limits.max.m1;
+ divisors.m1++) {
for (divisors.m2 = limits.min.m2; divisors.m2 <= limits.max.m2
&& ((divisors.m2 < divisors.m1) || is_igd);
divisors.m2++) {
for (divisors.n = limits.min.n; divisors.n <=
limits.max.n;
@@ -358,7 +366,8 @@
continue;
float error = fabs(requestedPixelClock
- - ((referenceClock *
divisors.m) / divisors.n) / divisors.post);
+ - ((referenceClock *
divisors.m) / divisors.n)
+ / divisors.post);
if (error < best) {
best = error;
bestDivisors = divisors;
@@ -373,7 +382,8 @@
divisors = bestDivisors;
- TRACE(("found: %g MHz, p = %lu (p1 = %lu, p2 = %lu), n = %lu, m = %lu
(m1 = %lu, m2 = %lu)\n",
+ TRACE(("found: %g MHz, p = %lu (p1 = %lu, p2 = %lu), n = %lu, m = %lu "
+ "(m1 = %lu, m2 = %lu)\n",
((referenceClock * divisors.m) / divisors.n) / divisors.post,
divisors.post, divisors.post1, divisors.post2, divisors.n,
divisors.m, divisors.m1, divisors.m2));
@@ -618,7 +628,7 @@
status_t
-intel_get_mode_list(display_mode *modeList)
+intel_get_mode_list(display_mode* modeList)
{
TRACE(("intel_get_mode_info()\n"));
memcpy(modeList, gInfo->mode_list,
@@ -628,8 +638,8 @@
status_t
-intel_propose_display_mode(display_mode *target, const display_mode *low,
- const display_mode *high)
+intel_propose_display_mode(display_mode* target, const display_mode* low,
+ const display_mode* high)
{
TRACE(("intel_propose_display_mode()\n"));
@@ -641,7 +651,7 @@
status_t
-intel_set_display_mode(display_mode *mode)
+intel_set_display_mode(display_mode* mode)
{
TRACE(("intel_set_display_mode(%ldx%ld)\n", mode->virtual_width,
mode->virtual_height));
@@ -712,7 +722,7 @@
}
// clear frame buffer before using it
- memset((uint8 *)base, 0, bytesPerRow * target.virtual_height);
+ memset((uint8*)base, 0, bytesPerRow * target.virtual_height);
sharedInfo.frame_buffer = base;
sharedInfo.frame_buffer_offset = base -
(addr_t)sharedInfo.graphics_memory;
@@ -1105,7 +1115,7 @@
status_t
-intel_get_display_mode(display_mode *_currentMode)
+intel_get_display_mode(display_mode* _currentMode)
{
TRACE(("intel_get_display_mode()\n"));
@@ -1131,7 +1141,7 @@
status_t
-intel_get_frame_buffer_config(frame_buffer_config *config)
+intel_get_frame_buffer_config(frame_buffer_config* config)
{
TRACE(("intel_get_frame_buffer_config()\n"));
@@ -1139,7 +1149,7 @@
config->frame_buffer = gInfo->shared_info->graphics_memory + offset;
config->frame_buffer_dma
- = (uint8 *)gInfo->shared_info->physical_graphics_memory +
offset;
+ = (uint8*)gInfo->shared_info->physical_graphics_memory + offset;
config->bytes_per_row = gInfo->shared_info->bytes_per_row;
return B_OK;
@@ -1147,13 +1157,14 @@
status_t
-intel_get_pixel_clock_limits(display_mode *mode, uint32 *_low, uint32 *_high)
+intel_get_pixel_clock_limits(display_mode* mode, uint32* _low, uint32* _high)
{
TRACE(("intel_get_pixel_clock_limits()\n"));
if (_low != NULL) {
// lower limit of about 48Hz vertical refresh
- uint32 totalClocks = (uint32)mode->timing.h_total *
(uint32)mode->timing.v_total;
+ uint32 totalClocks = (uint32)mode->timing.h_total
+ * (uint32)mode->timing.v_total;
uint32 low = (totalClocks * 48L) / 1000L;
if (low < gInfo->shared_info->pll_info.min_frequency)
low = gInfo->shared_info->pll_info.min_frequency;
@@ -1194,7 +1205,7 @@
status_t
-intel_get_timing_constraints(display_timing_constraints *constraints)
+intel_get_timing_constraints(display_timing_constraints* constraints)
{
TRACE(("intel_get_timing_contraints()\n"));
return B_ERROR;
@@ -1202,9 +1213,10 @@
void
-intel_set_indexed_colors(uint count, uint8 first, uint8 *colors, uint32 flags)
+intel_set_indexed_colors(uint count, uint8 first, uint8* colors, uint32 flags)
{
- TRACE(("intel_set_indexed_colors(colors = %p, first = %u)\n", colors,
first));
+ TRACE(("intel_set_indexed_colors(colors = %p, first = %u)\n", colors,
+ first));
if (colors == NULL)
return;
Modified: haiku/trunk/src/add-ons/accelerants/intel_extreme/overlay.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/intel_extreme/overlay.cpp
2011-10-16 14:38:44 UTC (rev 42862)
+++ haiku/trunk/src/add-ons/accelerants/intel_extreme/overlay.cpp
2011-10-16 15:15:03 UTC (rev 42863)
@@ -23,7 +23,7 @@
//#define TRACE_OVERLAY
#ifdef TRACE_OVERLAY
-extern "C" void _sPrintf(const char *format, ...);
+extern "C" void _sPrintf(const char* format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
@@ -63,19 +63,23 @@
int32 maxValue = 1 << mantissaSize;
res = 12 - mantissaSize;
- if ((intCoefficient = (int)(absCoefficient * 4 * maxValue + 0.5)) <
maxValue) {
+ if ((intCoefficient = (int)(absCoefficient * 4 * maxValue + 0.5))
+ < maxValue) {
splitCoefficient.exponent = 3;
splitCoefficient.mantissa = intCoefficient << res;
coefficient = (double)intCoefficient / (double)(4 * maxValue);
- } else if ((intCoefficient = (int)(absCoefficient * 2 * maxValue +
0.5)) < maxValue) {
+ } else if ((intCoefficient = (int)(absCoefficient * 2 * maxValue + 0.5))
+ < maxValue) {
splitCoefficient.exponent = 2;
splitCoefficient.mantissa = intCoefficient << res;
coefficient = (double)intCoefficient / (double)(2 * maxValue);
- } else if ((intCoefficient = (int)(absCoefficient * maxValue + 0.5)) <
maxValue) {
+ } else if ((intCoefficient = (int)(absCoefficient * maxValue + 0.5))
+ < maxValue) {
splitCoefficient.exponent = 1;
splitCoefficient.mantissa = intCoefficient << res;
coefficient = (double)intCoefficient / (double)maxValue;
- } else if ((intCoefficient = (int)(absCoefficient * maxValue * 0.5 +
0.5)) < maxValue) {
+ } else if ((intCoefficient = (int)(absCoefficient * maxValue * 0.5 +
0.5))
+ < maxValue) {
splitCoefficient.exponent = 0;
splitCoefficient.mantissa = intCoefficient << res;
coefficient = (double)intCoefficient / (double)(maxValue / 2);
@@ -94,7 +98,7 @@
static void
update_coefficients(int32 taps, double filterCutOff, bool horizontal, bool isY,
- phase_coefficient *splitCoefficients)
+ phase_coefficient* splitCoefficients)
{
if (filterCutOff < 1)
filterCutOff = 1;
@@ -184,7 +188,7 @@
set_color_key(uint8 red, uint8 green, uint8 blue, uint8 redMask,
uint8 greenMask, uint8 blueMask)
{
- overlay_registers *registers = gInfo->overlay_registers;
+ overlay_registers* registers = gInfo->overlay_registers;
registers->color_key_red = red;
registers->color_key_green = green;
@@ -197,7 +201,7 @@
static void
-set_color_key(const overlay_window *window)
+set_color_key(const overlay_window* window)
{
switch (gInfo->shared_info->current_mode.space) {
case B_CMAP8:
@@ -205,13 +209,13 @@
break;
case B_RGB15:
set_color_key(window->red.value << 3,
window->green.value << 3,
- window->blue.value << 3, window->red.mask << 3,
window->green.mask << 3,
- window->blue.mask << 3);
+ window->blue.value << 3, window->red.mask << 3,
+ window->green.mask << 3, window->blue.mask <<
3);
break;
case B_RGB16:
set_color_key(window->red.value << 3,
window->green.value << 2,
- window->blue.value << 3, window->red.mask << 3,
window->green.mask << 2,
- window->blue.mask << 3);
+ window->blue.value << 3, window->red.mask << 3,
+ window->green.mask << 2, window->blue.mask <<
3);
break;
default:
@@ -239,9 +243,11 @@
queue.PutWaitFor(COMMAND_WAIT_FOR_OVERLAY_FLIP);
queue.PutFlush();
- TRACE(("update overlay: UP: %lx, TST: %lx, ST: %lx, CMD: %lx (%lx),
ERR: %lx\n",
- read32(INTEL_OVERLAY_UPDATE), read32(INtEL_OVERLAY_TEST),
read32(INTEL_OVERLAY_STATUS),
- *(((uint32 *)gInfo->overlay_registers) + 0x68/4),
read32(0x30168), read32(0x2024)));
+ TRACE(("update overlay: UP: %lx, TST: %lx, ST: %lx, CMD: %lx (%lx), "
+ "ERR: %lx\n", read32(INTEL_OVERLAY_UPDATE),
read32(INtEL_OVERLAY_TEST),
+ read32(INTEL_OVERLAY_STATUS),
+ *(((uint32*)gInfo->overlay_registers) + 0x68/4),
read32(0x30168),
+ read32(0x2024)));
}
@@ -259,9 +265,11 @@
queue.PutOverlayFlip(COMMAND_OVERLAY_ON, true);
queue.PutFlush();
- TRACE(("show overlay: UP: %lx, TST: %lx, ST: %lx, CMD: %lx (%lx), ERR:
%lx\n",
- read32(INTEL_OVERLAY_UPDATE), read32(INTEL_OVERLAY_TEST),
read32(INTEL_OVERLAY_STATUS),
- *(((uint32 *)gInfo->overlay_registers) + 0x68/4),
read32(0x30168), read32(0x2024)));
+ TRACE(("show overlay: UP: %lx, TST: %lx, ST: %lx, CMD: %lx (%lx), "
+ "ERR: %lx\n", read32(INTEL_OVERLAY_UPDATE),
read32(INTEL_OVERLAY_TEST),
+ read32(INTEL_OVERLAY_STATUS),
+ *(((uint32*)gInfo->overlay_registers) + 0x68/4),
read32(0x30168),
+ read32(0x2024)));
}
@@ -272,7 +280,7 @@
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_965))
return;
- overlay_registers *registers = gInfo->overlay_registers;
+ overlay_registers* registers = gInfo->overlay_registers;
gInfo->shared_info->overlay_active = false;
registers->overlay_enabled = false;
@@ -299,7 +307,7 @@
uint32
-intel_overlay_count(const display_mode *mode)
+intel_overlay_count(const display_mode* mode)
{
// TODO: make this depending on the amount of RAM and the screen mode
// (and we could even have more than one when using 3D as well)
@@ -307,8 +315,8 @@
}
-const uint32 *
-intel_overlay_supported_spaces(const display_mode *mode)
+const uint32*
+intel_overlay_supported_spaces(const display_mode* mode)
{
static const uint32 kSupportedSpaces[] = {B_RGB15, B_RGB16, B_RGB32,
B_YCbCr422, 0};
@@ -332,12 +340,12 @@
}
-const overlay_buffer *
+const overlay_buffer*
intel_allocate_overlay_buffer(color_space colorSpace, uint16 width,
uint16 height)
{
- TRACE(("intel_allocate_overlay_buffer(width %u, height %u, colorSpace
%lu)\n",
- width, height, colorSpace));
+ TRACE(("intel_allocate_overlay_buffer(width %u, height %u, "
+ "colorSpace %lu)\n", width, height, colorSpace));
intel_shared_info &sharedInfo = *gInfo->shared_info;
[... truncated: 698 lines follow ...]
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