[haiku-commits] r42596 - in haiku/trunk: headers/private/graphics/radeon_hd src/add-ons/accelerants/radeon_hd src/add-ons/kernel/drivers/graphics/radeon_hd
- From: kallisti5@xxxxxxxxxxx
- To: haiku-commits@xxxxxxxxxxxxx
- Date: Sun, 7 Aug 2011 22:16:32 +0200 (CEST)
Author: kallisti5
Date: 2011-08-07 22:16:32 +0200 (Sun, 07 Aug 2011)
New Revision: 42596
Changeset: https://dev.haiku-os.org/changeset/42596
Modified:
haiku/trunk/headers/private/graphics/radeon_hd/radeon_hd.h
haiku/trunk/src/add-ons/accelerants/radeon_hd/display.cpp
haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
Log:
* add initial set of Northern Island cards
* add igp property to pciid map
* add disabled bios pull for r700 and ni cards
* refactor model numbering as >R700 AMD switched
to named card families
Modified: haiku/trunk/headers/private/graphics/radeon_hd/radeon_hd.h
===================================================================
--- haiku/trunk/headers/private/graphics/radeon_hd/radeon_hd.h 2011-08-07
15:42:21 UTC (rev 42595)
+++ haiku/trunk/headers/private/graphics/radeon_hd/radeon_hd.h 2011-08-07
20:16:32 UTC (rev 42596)
@@ -25,11 +25,16 @@
#include <PCI.h>
-#define VENDOR_ID_ATI 0x1002
+#define VENDOR_ID_ATI 0x1002
-#define RADEON_R600 0x0600
-#define RADEON_R700 0x0700
-#define RADEON_R800 0x0800
+#define RADEON_R520 0x0520 // Fudo
+#define RADEON_R580 0x0580 // Rodin
+#define RADEON_R600 0x0600 // Pele
+#define RADEON_R700 0x0700 // Wekiva
+#define RADEON_R1000 0x1000 // Evergreen
+#define RADEON_R2000 0x2000 // Northern Islands
+#define RADEON_R3000 0x3000 // Southern Islands
+#define RADEON_R4000 0x4000 // Not yet known / used
#define RADEON_VBIOS_SIZE 0x10000
Modified: haiku/trunk/src/add-ons/accelerants/radeon_hd/display.cpp
===================================================================
--- haiku/trunk/src/add-ons/accelerants/radeon_hd/display.cpp 2011-08-07
15:42:21 UTC (rev 42595)
+++ haiku/trunk/src/add-ons/accelerants/radeon_hd/display.cpp 2011-08-07
20:16:32 UTC (rev 42596)
@@ -33,7 +33,7 @@
radeon_shared_info &info = *gInfo->shared_info;
- if (info.device_chipset >= RADEON_R800) {
+ if (info.device_chipset >= RADEON_R1000) {
uint32 offset = 0;
// AMD Eyefinity on Evergreen GPUs
@@ -89,7 +89,7 @@
regs->viewportSize = offset + EVERGREEN_VIEWPORT_SIZE;
} else if (info.device_chipset >= RADEON_R600
- && info.device_chipset < RADEON_R800) {
+ && info.device_chipset < RADEON_R1000) {
// r600 - r700 are D1 or D2 based on primary / secondary crt
regs->vgaControl
Modified: haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
2011-08-07 15:42:21 UTC (rev 42595)
+++ haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
2011-08-07 20:16:32 UTC (rev 42596)
@@ -39,87 +39,123 @@
const struct supported_device {
uint32 device_id;
uint16 chipset;
+ bool igp;
const char* name;
} kSupportedDevices[] = {
// R600 series (HD24xx - HD42xx)
// Codename: Pele
- {0x94c7, RADEON_R600 | 0x10, "Radeon HD 2350"}, /*RV610*/
- {0x94c1, RADEON_R600 | 0x10, "Radeon HD 2400"}, /*RV610, IGP*/
- {0x94c3, RADEON_R600 | 0x10, "Radeon HD 2400"}, /*RV610*/
- {0x94cc, RADEON_R600 | 0x10, "Radeon HD 2400"}, /*RV610*/
- {0x9586, RADEON_R600 | 0x30, "Radeon HD 2600"}, /*RV630*/
- {0x9588, RADEON_R600 | 0x30, "Radeon HD 2600"}, /*RV630*/
- {0x958a, RADEON_R600 | 0x30, "Radeon HD 2600 X2"},/*RV630*/
+ {0x94c7, RADEON_R600 | 0x10, false, "Radeon HD 2350"},
+ {0x94c1, RADEON_R600 | 0x10, true, "Radeon HD 2400"},
+ {0x94c3, RADEON_R600 | 0x10, false, "Radeon HD 2400"},
+ {0x94cc, RADEON_R600 | 0x10, false, "Radeon HD 2400"},
+ {0x9586, RADEON_R600 | 0x30, false, "Radeon HD 2600"},
+ {0x9588, RADEON_R600 | 0x30, false, "Radeon HD 2600"},
+ {0x958a, RADEON_R600 | 0x30, false, "Radeon HD 2600 X2"},
// Radeon 2700 - RV630
- {0x9400, RADEON_R600 | 0x0, "Radeon HD 2900"}, /*RV600*/
- {0x9405, RADEON_R600 | 0x0, "Radeon HD 2900"}, /*RV600*/
- {0x9611, RADEON_R600 | 0x20, "Radeon HD 3100"}, /*RV620, IGP*/
- {0x9613, RADEON_R600 | 0x20, "Radeon HD 3100"}, /*RV620, IGP*/
- {0x9610, RADEON_R600 | 0x10, "Radeon HD 3200"}, /*RV610, IGP*/
- {0x9612, RADEON_R600 | 0x10, "Radeon HD 3200"}, /*RV610, IGP*/
- {0x9615, RADEON_R600 | 0x10, "Radeon HD 3200"}, /*RV610, IGP*/
- {0x9614, RADEON_R600 | 0x10, "Radeon HD 3300"}, /*RV610, IGP*/
+ {0x9400, RADEON_R600 | 0x00, false, "Radeon HD 2900"},
+ {0x9405, RADEON_R600 | 0x00, false, "Radeon HD 2900"},
+ {0x9611, RADEON_R600 | 0x20, true, "Radeon HD 3100"},
+ {0x9613, RADEON_R600 | 0x20, true, "Radeon HD 3100"},
+ {0x9610, RADEON_R600 | 0x10, true, "Radeon HD 3200"},
+ {0x9612, RADEON_R600 | 0x10, true, "Radeon HD 3200"},
+ {0x9615, RADEON_R600 | 0x10, true, "Radeon HD 3200"},
+ {0x9614, RADEON_R600 | 0x10, true, "Radeon HD 3300"},
// Radeon 3430 - RV620
- {0x95c5, RADEON_R600 | 0x20, "Radeon HD 3450"}, /*RV620*/
- {0x95c6, RADEON_R600 | 0x20, "Radeon HD 3450"}, /*RV620*/
- {0x95c7, RADEON_R600 | 0x20, "Radeon HD 3450"}, /*RV620*/
- {0x95c9, RADEON_R600 | 0x20, "Radeon HD 3450"}, /*RV620*/
- {0x95c4, RADEON_R600 | 0x20, "Radeon HD 3470"}, /*RV620*/
- {0x95c0, RADEON_R600 | 0x20, "Radeon HD 3550"}, /*RV620*/
- {0x9581, RADEON_R600 | 0x30, "Radeon HD 3600"}, /*RV630*/
- {0x9583, RADEON_R600 | 0x30, "Radeon HD 3600"}, /*RV630*/
- {0x9598, RADEON_R600 | 0x30, "Radeon HD 3600"}, /*RV630*/
- {0x9591, RADEON_R600 | 0x35, "Radeon HD 3600"}, /*RV635*/
- {0x9589, RADEON_R600 | 0x30, "Radeon HD 3610"}, /*RV630*/
+ {0x95c5, RADEON_R600 | 0x20, false, "Radeon HD 3450"},
+ {0x95c6, RADEON_R600 | 0x20, false, "Radeon HD 3450"},
+ {0x95c7, RADEON_R600 | 0x20, false, "Radeon HD 3450"},
+ {0x95c9, RADEON_R600 | 0x20, false, "Radeon HD 3450"},
+ {0x95c4, RADEON_R600 | 0x20, false, "Radeon HD 3470"},
+ {0x95c0, RADEON_R600 | 0x20, false, "Radeon HD 3550"},
+ {0x9581, RADEON_R600 | 0x30, false, "Radeon HD 3600"},
+ {0x9583, RADEON_R600 | 0x30, false, "Radeon HD 3600"},
+ {0x9598, RADEON_R600 | 0x30, false, "Radeon HD 3600"},
+ {0x9591, RADEON_R600 | 0x35, false, "Radeon HD 3600"},
+ {0x9589, RADEON_R600 | 0x30, false, "Radeon HD 3610"},
// Radeon 3650 - RV635
// Radeon 3670 - RV635
- {0x9507, RADEON_R600 | 0x70, "Radeon HD 3830"}, /*RV670*/
- {0x9505, RADEON_R600 | 0x70, "Radeon HD 3850"}, /*RV670, IGP*/
- {0x9513, RADEON_R600 | 0x80, "Radeon HD 3850 X2"},/*RV670*/
- {0x9501, RADEON_R600 | 0x70, "Radeon HD 3870"}, /*RV670*/
- {0x950F, RADEON_R600 | 0x80, "Radeon HD 3870 X2"},/*R680*/
- {0x9710, RADEON_R600 | 0x20, "Radeon HD 4200"}, /*RV620, IGP*/
- {0x9715, RADEON_R600 | 0x20, "Radeon HD 4250"}, /*RV620, IGP*/
- {0x9712, RADEON_R600 | 0x20, "Radeon HD 4270"}, /*RV620, IGP*/
- {0x9714, RADEON_R600 | 0x20, "Radeon HD 4290"}, /*RV620, IGP*/
+ {0x9507, RADEON_R600 | 0x70, false, "Radeon HD 3830"},
+ {0x9505, RADEON_R600 | 0x70, false, "Radeon HD 3850"},
+ {0x9513, RADEON_R600 | 0x80, false, "Radeon HD 3850 X2"},
+ {0x9501, RADEON_R600 | 0x70, false, "Radeon HD 3870"},
+ {0x950F, RADEON_R600 | 0x80, false, "Radeon HD 3870 X2"},
+ {0x9710, RADEON_R600 | 0x20, true, "Radeon HD 4200"},
+ {0x9715, RADEON_R600 | 0x20, true, "Radeon HD 4250"},
+ {0x9712, RADEON_R600 | 0x20, true, "Radeon HD 4270"},
+ {0x9714, RADEON_R600 | 0x20, true, "Radeon HD 4290"},
// R700 series (HD4330 - HD4890, HD51xx, HD5xxV)
// Codename: Wekiva
// Radeon 4330 - RV710
- {0x954f, RADEON_R700 | 0x10, "Radeon HD 4300"}, /*RV710*/
- {0x9552, RADEON_R700 | 0x10, "Radeon HD 4300"}, /*RV710*/
- {0x9555, RADEON_R700 | 0x10, "Radeon HD 4350"}, /*RV710*/
- {0x9540, RADEON_R700 | 0x10, "Radeon HD 4550"}, /*RV710*/
- {0x9498, RADEON_R700 | 0x30, "Radeon HD 4650"}, /*RV740*/
- {0x94b4, RADEON_R700 | 0x40, "Radeon HD 4700"}, /*RV740*/
- {0x9490, RADEON_R700 | 0x30, "Radeon HD 4710"}, /*RV740*/
- {0x94b3, RADEON_R700 | 0x40, "Radeon HD 4770"}, /*RV740*/
- {0x94b5, RADEON_R700 | 0x40, "Radeon HD 4770"}, /*RV740*/
- {0x944a, RADEON_R700 | 0x70, "Radeon HD 4800"}, /*RV740*/
- {0x944e, RADEON_R700 | 0x70, "Radeon HD 4810"}, /*RV740*/
- {0x944c, RADEON_R700 | 0x70, "Radeon HD 4830"}, /*RV740*/
- {0x9442, RADEON_R700 | 0x70, "Radeon HD 4850"}, /*RV770*/
- {0x9443, RADEON_R700 | 0x70, "Radeon HD 4850 X2"},/*RV770*/
- {0x94a1, RADEON_R700 | 0x90, "Radeon HD 4860"}, /*RV780, IGP*/
- {0x9440, RADEON_R700 | 0x70, "Radeon HD 4870"}, /*RV770*/
- {0x9441, RADEON_R700 | 0x70, "Radeon HD 4870 X2"},/*RV770*/
+ {0x954f, RADEON_R700 | 0x10, true, "Radeon HD 4300"},
+ {0x9552, RADEON_R700 | 0x10, true, "Radeon HD 4300"},
+ {0x9555, RADEON_R700 | 0x10, false, "Radeon HD 4350"},
+ {0x9540, RADEON_R700 | 0x10, false, "Radeon HD 4550"},
+ {0x9498, RADEON_R700 | 0x30, false, "Radeon HD 4650"},
+ {0x94b4, RADEON_R700 | 0x40, false, "Radeon HD 4700"},
+ {0x9490, RADEON_R700 | 0x30, false, "Radeon HD 4710"},
+ {0x94b3, RADEON_R700 | 0x40, false, "Radeon HD 4770"},
+ {0x94b5, RADEON_R700 | 0x40, false, "Radeon HD 4770"},
+ {0x944a, RADEON_R700 | 0x70, false, "Radeon HD 4800"},
+ {0x944e, RADEON_R700 | 0x70, false, "Radeon HD 4810"},
+ {0x944c, RADEON_R700 | 0x70, false, "Radeon HD 4830"},
+ {0x9442, RADEON_R700 | 0x70, false, "Radeon HD 4850"},
+ {0x9443, RADEON_R700 | 0x70, false, "Radeon HD 4850 X2"},
+ {0x94a1, RADEON_R700 | 0x90, true, "Radeon HD 4860"},
+ {0x9440, RADEON_R700 | 0x70, false, "Radeon HD 4870"},
+ {0x9441, RADEON_R700 | 0x70, false, "Radeon HD 4870 X2"},
- // R800 series (HD54xx - HD59xx)
+ // From here on AMD no longer used numeric identifiers
+
+ // R1000 series (HD54xx - HD59xx)
// Codename: Evergreen
- {0x68e1, RADEON_R800 | 0x0, "Radeon HD 5430"}, /*RV8XX*/
- {0x68f9, RADEON_R800 | 0x0, "Radeon HD 5450"}, /*RV8XX*/
- {0x68e0, RADEON_R800 | 0x0, "Radeon HD 5470"}, /*RV8XX*/
- {0x68da, RADEON_R800 | 0x0, "Radeon HD 5500"}, /*RV8XX*/
- {0x68d9, RADEON_R800 | 0x0, "Radeon HD 5570"}, /*RV8XX*/
- {0x68b9, RADEON_R800 | 0x0, "Radeon HD 5600"}, /*RV8XX*/
- {0x68c1, RADEON_R800 | 0x0, "Radeon HD 5650"}, /*RV8XX*/
- {0x68d8, RADEON_R800 | 0x0, "Radeon HD 5670"}, /*RV8XX*/
- {0x68be, RADEON_R800 | 0x0, "Radeon HD 5700"}, /*RV8XX*/
- {0x68b8, RADEON_R800 | 0x0, "Radeon HD 5770"}, /*RV8XX*/
- {0x689e, RADEON_R800 | 0x0, "Radeon HD 5800"}, /*RV8XX*/
- {0x6899, RADEON_R800 | 0x0, "Radeon HD 5850"}, /*RV8XX*/
- {0x6898, RADEON_R800 | 0x0, "Radeon HD 5870"}, /*RV8XX*/
- {0x689c, RADEON_R800 | 0x0, "Radeon HD 5900"} /*RV8XX*/
+ // Cedar
+ {0x68e1, RADEON_R1000 | 0x00, false, "Radeon HD 5430"},
+ {0x68f9, RADEON_R1000 | 0x00, false, "Radeon HD 5450"},
+ {0x68e0, RADEON_R1000 | 0x00, true, "Radeon HD 5470"},
+ // Redwood
+ {0x68da, RADEON_R1000 | 0x10, false, "Radeon HD 5500"},
+ {0x68d9, RADEON_R1000 | 0x10, false, "Radeon HD 5570"},
+ {0x68b9, RADEON_R1000 | 0x10, false, "Radeon HD 5600"},
+ {0x68c1, RADEON_R1000 | 0x10, false, "Radeon HD 5650"},
+ {0x68d8, RADEON_R1000 | 0x10, false, "Radeon HD 5670"},
+ // Juniper
+ {0x68be, RADEON_R1000 | 0x20, false, "Radeon HD 5700"},
+ {0x68b8, RADEON_R1000 | 0x20, false, "Radeon HD 5770"},
+ // Cypress
+ {0x689e, RADEON_R1000 | 0x30, false, "Radeon HD 5800"},
+ {0x6899, RADEON_R1000 | 0x30, false, "Radeon HD 5850"},
+ {0x6898, RADEON_R1000 | 0x30, false, "Radeon HD 5870"},
+ // Hemlock
+ {0x689c, RADEON_R1000 | 0x40, false, "Radeon HD 5900"},
+
+ // R2000 series (HD64xx - HD69xx)
+ // Codename: Nothern Islands
+ // Caicos
+ {0x6770, RADEON_R2000 | 0x00, true, "Radeon HD 6400"},
+ {0x6779, RADEON_R2000 | 0x00, false, "Radeon HD 6450"},
+ // Turks
+ {0x6759, RADEON_R2000 | 0x10, false, "Radeon HD 6570"},
+ {0x6741, RADEON_R2000 | 0x10, true, "Radeon HD 6650M"},
+ // Barts
+ {0x673e, RADEON_R2000 | 0x20, false, "Radeon HD 6790"},
+ {0x6739, RADEON_R2000 | 0x20, false, "Radeon HD 6850"},
+ {0x6738, RADEON_R2000 | 0x20, false, "Radeon HD 6870"},
+ // Cayman
+ {0x6718, RADEON_R2000 | 0x30, false, "Radeon HD 6970"},
+ // Antilles
+ {0x671d, RADEON_R2000 | 0x40, false, "Radeon HD 6990"}
+
+ // R3000 series (HD74xx - HD79xx)
+ // Codename: Southern Islands
+ // Lombok
+ // R3000 | 0x00
+ // Thames
+ // R3000 | 0x10
+ // Tahiti
+ // R3000 | 0x20
+ // New Zealand
+ // R3000 | 0x30
};
Modified:
haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
===================================================================
--- haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
2011-08-07 15:42:21 UTC (rev 42595)
+++ haiku/trunk/src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
2011-08-07 20:16:32 UTC (rev 42596)
@@ -156,6 +156,89 @@
status_t
+radeon_hd_getbios_ni(radeon_info &info)
+{
+ TRACE("card(%ld): %s: called\n", info.id, __func__);
+ uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);
+ uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);
+ uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);
+ uint32 vga_render_control
+ = read32(info.registers + AVIVO_VGA_RENDER_CONTROL);
+ uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);
+
+ // enable the rom
+ write32(info.registers + R600_BUS_CNTL, (bus_cntl &
~R600_BIOS_ROM_DIS));
+ // disable VGA mode
+ write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control
+ & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
+ | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
+ write32(info.registers + D2VGA_CONTROL, (d2vga_control
+ & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
+ | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
+ write32(info.registers + AVIVO_VGA_RENDER_CONTROL,
+ (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
+
+ write32(info.registers + R600_ROM_CNTL, (rom_cntl |
R600_SCK_OVERWRITE));
+
+ // try to grab the bios
+ status_t result = radeon_hd_getbios(info);
+
+ // restore regs
+ write32(info.registers + R600_BUS_CNTL, bus_cntl);
+ write32(info.registers + AVIVO_D1VGA_CONTROL, d1vga_control);
+ write32(info.registers + AVIVO_D2VGA_CONTROL, d2vga_control);
+ write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vga_render_control);
+ write32(info.registers + R600_ROM_CNTL, rom_cntl);
+
+ return result;
+}
+
+
+status_t
+radeon_hd_getbios_r700(radeon_info &info)
+{
+ TRACE("card(%ld): %s: called\n", info.id, __func__);
+ uint32 viph_control = read32(info.registers + RADEON_VIPH_CONTROL);
+ uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);
+ uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);
+ uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);
+ uint32 vga_render_control
+ = read32(info.registers + AVIVO_VGA_RENDER_CONTROL);
+ uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);
+
+ // disable VIP
+ write32(info.registers + RADEON_VIPH_CONTROL,
+ (viph_control & ~RADEON_VIPH_EN));
+ // enable the rom
+ write32(info.registers + R600_BUS_CNTL, (bus_cntl &
~R600_BIOS_ROM_DIS));
+ // disable VGA mode
+ write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control
+ & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
+ | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
+ write32(info.registers + D2VGA_CONTROL, (d2vga_control
+ & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE
+ | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
+ write32(info.registers + AVIVO_VGA_RENDER_CONTROL,
+ (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
+
+ write32(info.registers + R600_ROM_CNTL, (rom_cntl |
R600_SCK_OVERWRITE));
+
+ // try to grab the bios
+ status_t result = radeon_hd_getbios(info);
+
+ // restore regs
+ write32(info.registers + RADEON_VIPH_CONTROL, viph_control);
+ write32(info.registers + R600_BUS_CNTL, bus_cntl);
+ write32(info.registers + AVIVO_D1VGA_CONTROL, d1vga_control);
+ write32(info.registers + AVIVO_D2VGA_CONTROL, d2vga_control);
+ write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vga_render_control);
+ write32(info.registers + R600_ROM_CNTL, rom_cntl);
+
+ return result;
+}
+
+
+status_t
radeon_hd_getbios_r600(radeon_info &info)
{
TRACE("card(%ld): %s: called\n", info.id, __func__);
@@ -304,7 +387,13 @@
status_t biosStatus = radeon_hd_getbios(info);
if (biosStatus != B_OK) {
// If the active read fails, we do a disabled read
- if (info.device_chipset > RADEON_R600)
+
+ // TODO : IGP read
+ if (info.device_chipset >= (RADEON_R1000 | 0x20))
+ biosStatus = radeon_hd_getbios_ni(info);
+ else if (info.device_chipset >= (RADEON_R700 | 0x70))
+ biosStatus = radeon_hd_getbios_r700(info);
+ else if (info.device_chipset >= RADEON_R600)
biosStatus = radeon_hd_getbios_r600(info);
}
@@ -330,7 +419,7 @@
}
// *** Populate graphics_memory/aperture_size with KB
- if (info.shared_info->device_chipset >= RADEON_R800) {
+ if (info.shared_info->device_chipset >= RADEON_R1000) {
// R800+ has memory stored in MB
info.shared_info->graphics_memory_size
= read32(info.registers + R6XX_CONFIG_MEMSIZE) * 1024;
Other related posts:
- » [haiku-commits] r42596 - in haiku/trunk: headers/private/graphics/radeon_hd src/add-ons/accelerants/radeon_hd src/add-ons/kernel/drivers/graphics/radeon_hd - kallisti5
