hrev52173 adds 1 changeset to branch 'master'
old head: 5301f108efb9e3d82920fc6c4d3488d69772a4eb
new head: 8d86b84d18535654da5b693537802d6ca115efe0
overview:
https://git.haiku-os.org/haiku/log/?qt=range&q=8d86b84d1853+%5E5301f108efb9
----------------------------------------------------------------------------
8d86b84d1853: Accelerants: Fix -Wformat-overflow
* Use strlcpy() and strlcat() instead of sprintf()
to suppress -Wformat-overflow pointed by gcc8.
* Add <string.h> to mga_std.h for strlcpy() and strlcat().
Change-Id: Ib038283fd213c9e0ac9f19482402b55d2e3f204a
Reviewed-on: https://review.haiku-os.org/429
Reviewed-by: waddlesplash <waddlesplash@xxxxxxxxx>
Reviewed-by: Adrien Destugues <pulkomandy@xxxxxxxxx>
[ Murai Takashi <tmurai01@xxxxxxxxx> ]
----------------------------------------------------------------------------
Revision: hrev52173
Commit: 8d86b84d18535654da5b693537802d6ca115efe0
URL: https://git.haiku-os.org/haiku/commit/?id=8d86b84d1853
Author: Murai Takashi <tmurai01@xxxxxxxxx>
Date: Sat Aug 4 12:43:43 2018 UTC
Committer: waddlesplash <waddlesplash@xxxxxxxxx>
Commit-Date: Mon Aug 6 00:13:12 2018 UTC
----------------------------------------------------------------------------
5 files changed, 43 insertions(+), 42 deletions(-)
src/add-ons/accelerants/matrox/engine/mga_crtc.c | 14 +++++------
.../accelerants/matrox/engine/mga_crtc2.c | 26 ++++++++++----------
src/add-ons/accelerants/matrox/engine/mga_std.h | 1 +
src/add-ons/accelerants/nvidia/engine/nv_crtc.c | 22 ++++++++---------
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c | 22 ++++++++---------
----------------------------------------------------------------------------
diff --git a/src/add-ons/accelerants/matrox/engine/mga_crtc.c
b/src/add-ons/accelerants/matrox/engine/mga_crtc.c
index e68d37ec1c..0a68396278 100644
--- a/src/add-ons/accelerants/matrox/engine/mga_crtc.c
+++ b/src/add-ons/accelerants/matrox/engine/mga_crtc.c
@@ -286,37 +286,37 @@ status_t gx00_crtc_dpms(bool display, bool h, bool v) //
MIL2
{
char msg[100];
- sprintf(msg, "CRTC: setting DPMS: ");
+ strlcpy(msg, "CRTC: setting DPMS: ", sizeof(msg));
if (display)
{
VGAW_I(SEQ,1, 0x00);
- sprintf(msg, "%sdisplay on, ", msg);
+ strlcat(msg, "display on, ", sizeof(msg));
}
else
{
VGAW_I(SEQ,1, 0x20);
- sprintf(msg, "%sdisplay off, ", msg);
+ strlcat(msg, "display off, ", sizeof(msg));
}
if (h)
{
VGAW_I(CRTCEXT, 1, (VGAR_I(CRTCEXT, 1) & 0xef));
- sprintf(msg, "%shsync enabled, ", msg);
+ strlcat(msg, "hsync enabled, ", sizeof(msg));
}
else
{
VGAW_I(CRTCEXT, 1, (VGAR_I(CRTCEXT, 1) | 0x10));
- sprintf(msg, "%shsync disabled, ", msg);
+ strlcat(msg, "hsync disabled, ", sizeof(msg));
}
if (v)
{
VGAW_I(CRTCEXT, 1, (VGAR_I(CRTCEXT, 1) & 0xdf));
- sprintf(msg, "%svsync enabled\n", msg);
+ strlcat(msg, "vsync enabled\n", sizeof(msg));
}
else
{
VGAW_I(CRTCEXT, 1, (VGAR_I(CRTCEXT, 1) | 0x20));
- sprintf(msg, "%svsync disabled\n", msg);
+ strlcat(msg, "vsync disabled\n", sizeof(msg));
}
LOG(4, (msg));
diff --git a/src/add-ons/accelerants/matrox/engine/mga_crtc2.c
b/src/add-ons/accelerants/matrox/engine/mga_crtc2.c
index 9bd17db8b0..74e9cfbf9d 100644
--- a/src/add-ons/accelerants/matrox/engine/mga_crtc2.c
+++ b/src/add-ons/accelerants/matrox/engine/mga_crtc2.c
@@ -161,7 +161,7 @@ status_t g400_crtc2_dpms(bool display, bool h, bool v)
{
char msg[100];
- sprintf(msg, "CRTC2: setting DPMS: ");
+ strlcpy(msg, "CRTC2: setting DPMS: ", sizeof(msg));
if (si->ps.card_type <= G400MAX)
{
@@ -169,13 +169,13 @@ status_t g400_crtc2_dpms(bool display, bool h, bool v)
{
/* enable CRTC2 and don't touch the rest */
CR2W(CTL, ((CR2R(CTL) & 0xFFF0177E) | 0x01));
- sprintf(msg, "%sdisplay on, hsync enabled, vsync
enabled\n", msg);
+ strlcat(msg, "display on, hsync enabled, vsync
enabled\n", sizeof(msg));
}
else
{
/* disable CRTC2 and don't touch the rest */
CR2W(CTL, (CR2R(CTL) & 0xFFF0177E));
- sprintf(msg, "%sdisplay off, hsync disabled, vsync
disabled\n", msg);
+ strlcat(msg, "display off, hsync disabled, vsync
disabled\n", sizeof(msg));
}
LOG(4, (msg));
@@ -194,13 +194,13 @@ status_t g400_crtc2_dpms(bool display, bool h, bool v)
{
/* enable CRTC2 and don't touch the rest */
CR2W(CTL, ((CR2R(CTL) & 0xFFF0177E) | 0x01));
- sprintf(msg, "%sdisplay on, ", msg);
+ strlcat(msg, "display on, ", sizeof(msg));
}
else
{
/* disable CRTC2 and don't touch the rest */
CR2W(CTL, (CR2R(CTL) & 0xFFF0177E));
- sprintf(msg, "%sdisplay off, ", msg);
+ strlcat(msg, "display off, ", sizeof(msg));
}
if (si->crossed_conns)
@@ -209,25 +209,25 @@ status_t g400_crtc2_dpms(bool display, bool h, bool v)
{
/* enable DVI-A hsync */
temp &= ~0x01;
- sprintf(msg, "%shsync enabled, ", msg);
+ strlcat(msg, "hsync enabled, ", sizeof(msg));
}
else
{
/* disable DVI-A hsync */
temp |= 0x01;
- sprintf(msg, "%shsync disabled, ", msg);
+ strlcat(msg, "hsync disabled, ", sizeof(msg));
}
if (v)
{
/* enable DVI-A vsync */
temp &= ~0x02;
- sprintf(msg, "%svsync enabled\n", msg);
+ strlcat(msg, "vsync enabled\n", sizeof(msg));
}
else
{
/* disable DVI-A vsync */
temp |= 0x02;
- sprintf(msg, "%svsync disabled\n", msg);
+ strlcat(msg, "vsync disabled\n", sizeof(msg));
}
}
else
@@ -236,25 +236,25 @@ status_t g400_crtc2_dpms(bool display, bool h, bool v)
{
/* enable HD15 hsync */
temp &= ~0x10;
- sprintf(msg, "%shsync enabled, ", msg);
+ strlcat(msg, "hsync enabled, ", sizeof(msg));
}
else
{
/* disable HD15 hsync */
temp |= 0x10;
- sprintf(msg, "%shsync disabled, ", msg);
+ strlcat(msg, "hsync disabled, ", sizeof(msg));
}
if (v)
{
/* enable HD15 vsync */
temp &= ~0x20;
- sprintf(msg, "%svsync enabled\n", msg);
+ strlcat(msg, "vsync enabled\n", sizeof(msg));
}
else
{
/* disable HD15 vsync */
temp |= 0x20;
- sprintf(msg, "%svsync disabled\n", msg);
+ strlcat(msg, "vsync disabled\n", sizeof(msg));
}
}
diff --git a/src/add-ons/accelerants/matrox/engine/mga_std.h
b/src/add-ons/accelerants/matrox/engine/mga_std.h
index af5555b8c9..bf3b2093de 100644
--- a/src/add-ons/accelerants/matrox/engine/mga_std.h
+++ b/src/add-ons/accelerants/matrox/engine/mga_std.h
@@ -1,4 +1,5 @@
#include <stdio.h>
+#include <string.h>
#include <sys/ioctl.h>
#include <math.h>
#include <OS.h>
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
index b291a77517..147d3eada7 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc.c
@@ -603,7 +603,7 @@ status_t nv_crtc_dpms(bool display, bool h, bool v, bool
do_panel)
uint8 temp;
char msg[100];
- sprintf(msg, "CRTC: setting DPMS: ");
+ strlcpy(msg, "CRTC: setting DPMS: ", sizeof(msg));
/* enable access to primary head */
set_crtc_owner(0);
@@ -644,7 +644,7 @@ status_t nv_crtc_dpms(bool display, bool h, bool v, bool
do_panel)
/* (confirmed OK on NV28 and NV34) */
//CRTCW(0x59, (CRTCR(0x59) | 0x01));
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
else
{
@@ -656,12 +656,12 @@ status_t nv_crtc_dpms(bool display, bool h, bool v, bool
do_panel)
/* note: this seems to be a write-only
register. */
NV_REG32(NV32_LVDS_PWR) = 0x00000003;
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
}
}
- sprintf(msg, "%sdisplay on, ", msg);
+ strlcat(msg, "display on, ", sizeof(msg));
}
else
{
@@ -687,7 +687,7 @@ status_t nv_crtc_dpms(bool display, bool h, bool v, bool
do_panel)
/* (confirmed OK on NV28 and NV34) */
//CRTCW(0x59, (CRTCR(0x59) & 0xfe));
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
else
{
@@ -699,33 +699,33 @@ status_t nv_crtc_dpms(bool display, bool h, bool v, bool
do_panel)
/* note: this seems to be a write-only
register. */
NV_REG32(NV32_LVDS_PWR) = 0x00000007;
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
}
}
- sprintf(msg, "%sdisplay off, ", msg);
+ strlcat(msg, "display off, ", sizeof(msg));
}
if (h)
{
CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0x7f));
- sprintf(msg, "%shsync enabled, ", msg);
+ strlcat(msg, "hsync enabled, ", sizeof(msg));
}
else
{
CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x80));
- sprintf(msg, "%shsync disabled, ", msg);
+ strlcat(msg, "hsync disabled, ", sizeof(msg));
}
if (v)
{
CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xbf));
- sprintf(msg, "%svsync enabled\n", msg);
+ strlcat(msg, "vsync enabled\n", sizeof(msg));
}
else
{
CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x40));
- sprintf(msg, "%svsync disabled\n", msg);
+ strlcat(msg, "vsync disabled\n", sizeof(msg));
}
LOG(4, (msg));
diff --git a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
index 9f74784f37..a650f14e9f 100644
--- a/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
+++ b/src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
@@ -586,7 +586,7 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v, bool
do_panel)
uint8 temp;
char msg[100];
- sprintf(msg, "CRTC2: setting DPMS: ");
+ strlcpy(msg, "CRTC2: setting DPMS: ", sizeof(msg));
/* enable access to secondary head */
set_crtc_owner(1);
@@ -627,7 +627,7 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v, bool
do_panel)
/* (confirmed OK on NV28 and NV34) */
//CRTC2W(0x59, (CRTC2R(0x59) | 0x01));
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
else
{
@@ -638,12 +638,12 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v, bool
do_panel)
/* note: this seems to be a write-only
register. */
NV_REG32(NV32_LVDS_PWR) = 0x00000003;
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
}
}
- sprintf(msg, "%sdisplay on, ", msg);
+ strlcat(msg, "display on, ", sizeof(msg));
}
else
{
@@ -669,7 +669,7 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v, bool
do_panel)
/* (confirmed OK on NV28 and NV34) */
//CRTC2W(0x59, (CRTC2R(0x59) & 0xfe));
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
else
{
@@ -680,33 +680,33 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v, bool
do_panel)
/* note: this seems to be a write-only
register. */
NV_REG32(NV32_LVDS_PWR) = 0x00000007;
- sprintf(msg, "%s(panel-)", msg);
+ strlcat(msg, "(panel-)", sizeof(msg));
}
}
}
- sprintf(msg, "%sdisplay off, ", msg);
+ strlcat(msg, "display off, ", sizeof(msg));
}
if (h)
{
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0x7f));
- sprintf(msg, "%shsync enabled, ", msg);
+ strlcat(msg, "hsync enabled, ", sizeof(msg));
}
else
{
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x80));
- sprintf(msg, "%shsync disabled, ", msg);
+ strlcat(msg, "hsync disabled, ", sizeof(msg));
}
if (v)
{
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xbf));
- sprintf(msg, "%svsync enabled\n", msg);
+ strlcat(msg, "vsync enabled\n", sizeof(msg));
}
else
{
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x40));
- sprintf(msg, "%svsync disabled\n", msg);
+ strlcat(msg, "vsync disabled\n", sizeof(msg));
}
LOG(4, (msg));
