hrev51132 adds 1 changeset to branch 'master'
old head: 58e3bf632f7451134c671ea271d497db14355fa0
new head: a2be272b553ea07f8fb6bfa867b55efe07fdf4a0
overview:
http://cgit.haiku-os.org/haiku/log/?qt=range&q=a2be272b553e+%5E58e3bf632f74
----------------------------------------------------------------------------
a2be272b553e: xhci: Clean up command register defines
* Ensure their naming match Intel xhci datasheets
[ Alexander von Gluck IV <kallisti5@xxxxxxxxxxx> ]
----------------------------------------------------------------------------
Revision: hrev51132
Commit: a2be272b553ea07f8fb6bfa867b55efe07fdf4a0
URL: http://cgit.haiku-os.org/haiku/commit/?id=a2be272b553e
Author: Alexander von Gluck IV <kallisti5@xxxxxxxxxxx>
Date: Thu Apr 27 23:24:42 2017 UTC
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2 files changed, 17 insertions(+), 9 deletions(-)
src/add-ons/kernel/busses/usb/xhci.cpp | 2 +-
src/add-ons/kernel/busses/usb/xhci_hardware.h | 24 +++++++++++++++--------
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diff --git a/src/add-ons/kernel/busses/usb/xhci.cpp
b/src/add-ons/kernel/busses/usb/xhci.cpp
index 0945907..ac98fa2 100644
--- a/src/add-ons/kernel/busses/usb/xhci.cpp
+++ b/src/add-ons/kernel/busses/usb/xhci.cpp
@@ -540,7 +540,7 @@ XHCI::Start()
TRACE("enabling interrupt\n");
WriteRunReg32(XHCI_IMAN(0), ReadRunReg32(XHCI_IMAN(0)) | IMAN_INTR_ENA);
- WriteOpReg(XHCI_CMD, CMD_RUN | CMD_EIE | CMD_HSEIE);
+ WriteOpReg(XHCI_CMD, CMD_RUN | CMD_INTE | CMD_HSEE);
// wait for start up state
int32 tries = 100;
diff --git a/src/add-ons/kernel/busses/usb/xhci_hardware.h
b/src/add-ons/kernel/busses/usb/xhci_hardware.h
index 51987f9..f00b805 100644
--- a/src/add-ons/kernel/busses/usb/xhci_hardware.h
+++ b/src/add-ons/kernel/busses/usb/xhci_hardware.h
@@ -52,17 +52,25 @@
// USB Command Register
#define CMD_RUN (1 << 0)
#define CMD_HCRST (1 << 1) // Host Controller Reset
-#define CMD_EIE (1 << 2)
-#define CMD_HSEIE (1 << 3)
+#define CMD_INTE (1 << 2) // IRQ Enable
+#define CMD_HSEE (1 << 3) // Host System Error En
+#define CMD_LHCRST (1 << 7) // Light Host
Controller Reset
+#define CMD_CSS (1 << 8) // Controller
Save State
+#define CMD_CRS (1 << 9) // Controller
Restore State
+#define CMD_EWE (1 << 10) // Enable Wrap
Event
#define XHCI_STS 0x04 // USB Status
// USB Status Register
-#define STS_HCH (1 << 0)
-#define STS_HSE (1 << 2)
-#define STS_EINT (1 << 3)
-#define STS_PCD (1 << 4)
-#define STS_CNR (1 << 11)
-#define STS_HCE (1 << 12)
+#define STS_HCH (1 << 0) // Host
Controller Halt
+#define STS_HSE (1 << 2) // Host System
Error
+#define STS_EINT (1 << 3) // Event Interrupt
+#define STS_PCD (1 << 4) // Port Change
Detect
+#define STS_SSS (1 << 8) // Save State
Status
+#define STS_RSS (1 << 9) // Restore
State Status
+#define STS_SRE (1 << 10) // Save Restore
Error
+#define STS_CNR (1 << 11) // Controller
Not Ready
+#define STS_HCE (1 << 12) // Host
Controller Error
+
#define XHCI_PAGESIZE 0x08 // PAGE SIZE
#define XHCI_DNCTRL 0x14
// Section 5.4.5
